[PATCH 20/28] drm/amd/display: Add check for vrr_active_fixed

[Stylon Wang]

From: Austin Zheng <austin.zh...@amd.com>

Why:
vrr_active_fixed should also be checked when
determining if DRR is in use

How:
Add check for vrr_active_fixed when allow_freesync
and vrr_active_variable are also checked

Reviewed-by: Alvin Lee <alvin.l...@amd.com>
Acked-by: Stylon Wang <stylon.w...@amd.com>
Signed-off-by: Austin Zheng <austin.zh...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c                  | 4 ++--
 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c | 4 ++--
 drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c          | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c 
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 979f52ee5604..2f98dfa06dad 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -554,7 +554,7 @@ static void populate_subvp_cmd_vblank_pipe_info(struct dc 
*dc,
                        vblank_pipe->stream->timing.v_total - 
vblank_pipe->stream->timing.v_front_porch - 
vblank_pipe->stream->timing.v_addressable;
 
        if (vblank_pipe->stream->ignore_msa_timing_param &&
-               (vblank_pipe->stream->allow_freesync || 
vblank_pipe->stream->vrr_active_variable))
+               (vblank_pipe->stream->allow_freesync || 
vblank_pipe->stream->vrr_active_variable || 
vblank_pipe->stream->vrr_active_fixed))
                populate_subvp_cmd_drr_info(dc, pipe, vblank_pipe, pipe_data);
 }
 
@@ -648,7 +648,7 @@ static void populate_subvp_cmd_pipe_info(struct dc *dc,
        pipe_data->pipe_config.subvp_data.mall_region_lines = 
phantom_timing->v_addressable;
        pipe_data->pipe_config.subvp_data.main_pipe_index = 
subvp_pipe->stream_res.tg->inst;
        pipe_data->pipe_config.subvp_data.is_drr = 
subvp_pipe->stream->ignore_msa_timing_param &&
-               (subvp_pipe->stream->allow_freesync || 
subvp_pipe->stream->vrr_active_variable);
+               (subvp_pipe->stream->allow_freesync || 
subvp_pipe->stream->vrr_active_variable || 
subvp_pipe->stream->vrr_active_fixed);
 
        /* Calculate the scaling factor from the src and dst height.
         * e.g. If 3840x2160 being downscaled to 1920x1080, the scaling factor 
is 1/2.
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c 
b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
index f5705b3e6e42..bc5f0db23d0c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
@@ -706,7 +706,7 @@ bool dcn32_subvp_drr_admissable(struct dc *dc, struct 
dc_state *context)
                                non_subvp_pipes++;
                                drr_psr_capable = (drr_psr_capable || 
dcn32_is_psr_capable(pipe));
                                if (pipe->stream->ignore_msa_timing_param &&
-                                               (pipe->stream->allow_freesync 
|| pipe->stream->vrr_active_variable)) {
+                                               (pipe->stream->allow_freesync 
|| pipe->stream->vrr_active_variable || pipe->stream->vrr_active_fixed)) {
                                        drr_pipe_found = true;
                                }
                        }
@@ -764,7 +764,7 @@ bool dcn32_subvp_vblank_admissable(struct dc *dc, struct 
dc_state *context, int
                                non_subvp_pipes++;
                                vblank_psr_capable = (vblank_psr_capable || 
dcn32_is_psr_capable(pipe));
                                if (pipe->stream->ignore_msa_timing_param &&
-                                               (pipe->stream->allow_freesync 
|| pipe->stream->vrr_active_variable)) {
+                                               (pipe->stream->allow_freesync 
|| pipe->stream->vrr_active_variable || pipe->stream->vrr_active_fixed)) {
                                        drr_pipe_found = true;
                                }
                        }
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c 
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index 2358c9100cff..92e2d1df5b32 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -822,7 +822,7 @@ static bool subvp_drr_schedulable(struct dc *dc, struct 
dc_state *context)
                        continue;
 
                if (drr_pipe->stream->mall_stream_config.type == SUBVP_NONE && 
drr_pipe->stream->ignore_msa_timing_param &&
-                               (drr_pipe->stream->allow_freesync || 
drr_pipe->stream->vrr_active_variable))
+                               (drr_pipe->stream->allow_freesync || 
drr_pipe->stream->vrr_active_variable || drr_pipe->stream->vrr_active_fixed))
                        break;
        }
 
-- 
2.42.0