On 6/4/23 23:10, Srinivasan Shanmugam wrote:
Fixes the following W=1 kernel build warning: display/dc/dcn10/dcn10_opp.c:52: warning: Function parameter or member 'oppn10' not described in 'opp1_set_truncation' display/dc/dcn10/dcn10_opp.c:52: warning: Function parameter or member 'params' not described in 'opp1_set_truncation' display/dc/dcn10/dcn10_opp.c:52: warning: expecting prototype for set_truncation(). Prototype was for opp1_set_truncation() instead display/dc/dcn10/dcn10_opp.c:161: warning: Function parameter or member 'oppn10' not described in 'opp1_set_pixel_encoding' display/dc/dcn10/dcn10_opp.c:161: warning: Function parameter or member 'params' not described in 'opp1_set_pixel_encoding' display/dc/dcn10/dcn10_opp.c:161: warning: expecting prototype for set_pixel_encoding(). Prototype was for opp1_set_pixel_encoding() instead display/dc/dcn10/dcn10_opp.c:183: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Set Clamping Cc: Rodrigo Siqueira <rodrigo.sique...@amd.com> Cc: Aurabindo Pillai <aurabindo.pil...@amd.com> Cc: Harry Wentland <harry.wentl...@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmu...@amd.com> --- .../gpu/drm/amd/display/dc/dcn10/dcn10_opp.c | 20 +++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c index 41cec7acf51f..0dec57679269 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c @@ -37,14 +37,14 @@ #define CTX \ oppn10->base.ctx--/************* FORMATTER ************/ - /** - * set_truncation + * opp1_set_truncation(): * 1) set truncation depth: 0 for 18 bpp or 1 for 24 bpp * 2) enable truncation * 3) HW remove 12bit FMT support for DCE11 power saving reason. + * + * @oppn10: output_pixel_processor struct instance for dcn10. + * @params: pointer to bit_depth_reduction_params. */ static void opp1_set_truncation( struct dcn10_opp *oppn10, @@ -149,11 +149,12 @@ void opp1_program_bit_depth_reduction( }/**- * set_pixel_encoding - * - * Set Pixel Encoding + * opp1_set_pixel_encoding(): * 0: RGB 4:4:4 or YCbCr 4:4:4 or YOnly * 1: YCbCr 4:2:2 + * + * @oppn10: output_pixel_processor struct instance for dcn10. + * @params: pointer to clamping_and_pixel_encoding_params. */ static void opp1_set_pixel_encoding( struct dcn10_opp *oppn10, @@ -180,13 +181,16 @@ static void opp1_set_pixel_encoding( }/**- * Set Clamping + * opp1_set_clamping(): * 1) Set clamping format based on bpc - 0 for 6bpc (No clamping) * 1 for 8 bpc * 2 for 10 bpc * 3 for 12 bpc * 7 for programable * 2) Enable clamp if Limited range requested + * + * @oppn10: output_pixel_processor struct instance for dcn10. + * @params: pointer to clamping_and_pixel_encoding_params. */ static void opp1_set_clamping( struct dcn10_opp *oppn10,
Reviewed-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
