Re: [PATCH 1/2] Revert "drm/amd/display: Block optimize on consecutive FAMS enables"

[Hamza Mahfooz]

On 5/22/23 09:08, Michel Dänzer wrote:

From: Michel Dänzer <mdaen...@redhat.com>

This reverts commit ce560ac40272a5c8b5b68a9d63a75edd9e66aed2.

It depends on its parent commit, which we want to revert.

Signed-off-by: Michel Dänzer <mdaen...@redhat.com>

I have applied the series, thanks!

---
  .../drm/amd/display/dc/dcn20/dcn20_hwseq.c    |  3 ---
  .../drm/amd/display/dc/dcn30/dcn30_hwseq.c    | 22 +++----------------
  2 files changed, 3 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 422fbf79da64..6ce10fd4bb1a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -2117,9 +2117,6 @@ void dcn20_optimize_bandwidth(
                dc_dmub_srv_p_state_delegate(dc,
                        true, context);
                context->bw_ctx.bw.dcn.clk.p_state_change_support = true;
-               dc->clk_mgr->clks.fw_based_mclk_switching = true;
-       } else {
-               dc->clk_mgr->clks.fw_based_mclk_switching = false;
        }

dc->clk_mgr->funcs->update_clocks(

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
index 8263a07f265f..0411867654dd 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
@@ -983,13 +983,9 @@ void dcn30_set_disp_pattern_generator(const struct dc *dc,
  }

void dcn30_prepare_bandwidth(struct dc *dc,

-       struct dc_state *context)
+       struct dc_state *context)
  {
-       bool p_state_change_support = 
context->bw_ctx.bw.dcn.clk.p_state_change_support;
-       /* Any transition into an FPO config should disable MCLK switching 
first to avoid
-        * driver and FW P-State synchronization issues.
-        */
-       if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || 
dc->clk_mgr->clks.fw_based_mclk_switching) {
+       if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) {
                dc->optimized_required = true;
                context->bw_ctx.bw.dcn.clk.p_state_change_support = false;
        }
@@ -1000,19 +996,7 @@ void dcn30_prepare_bandwidth(struct dc *dc,
                        dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, 
dc->clk_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries - 
1].memclk_mhz);

dcn20_prepare_bandwidth(dc, context);

-       /*
-        * enabled -> enabled: do not disable
-        * enabled -> disabled: disable
-        * disabled -> enabled: don't care
-        * disabled -> disabled: don't care
-        */
-       if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching)
-               dc_dmub_srv_p_state_delegate(dc, false, context);

- if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || dc->clk_mgr->clks.fw_based_mclk_switching) {

-               /* After disabling P-State, restore the original value to 
ensure we get the correct P-State
-                * on the next optimize. */
-               context->bw_ctx.bw.dcn.clk.p_state_change_support = 
p_state_change_support;
-       }
+       dc_dmub_srv_p_state_delegate(dc, false, context);
  }

--
Hamza