[Public]
> -----Original Message-----
> From: Guilherme G. Piccoli <gpicc...@igalia.com>
> Sent: Tuesday, January 17, 2023 11:59
> To: amd-gfx@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Deucher, Alexander
> <alexander.deuc...@amd.com>; Koenig, Christian
> <christian.koe...@amd.com>; Pan, Xinhui <xinhui....@amd.com>;
> ker...@gpiccoli.net; kernel-...@igalia.com; Guilherme G. Piccoli
> <gpicc...@igalia.com>; Zhu, James <james....@amd.com>; Lazar, Lijo
> <lijo.la...@amd.com>; Liu, Leo <leo....@amd.com>; Limonciello, Mario
> <mario.limoncie...@amd.com>; Jiang, Sonny <sonny.ji...@amd.com>
> Subject: [PATCH v2 2/2] drm/amdgpu/vcn: Remove redundant indirect SRAM
> HW model check
>
> The HW model validation that guards the indirect SRAM checking in the
> VCN code path is redundant - there's no model that's not included in the
> switch, making it useless in practice [0].
>
> So, let's remove this switch statement for good.
>
> [0] lore.kernel.org/amd-
> gfx/mn0pr12mb61013d20b8a2263b22ae1bcfe2...@mn0pr12mb6101.na
> mprd12.prod.outlook.com
>
> Cc: James Zhu <james....@amd.com>
> Cc: Lazar Lijo <lijo.la...@amd.com>
> Cc: Leo Liu <leo....@amd.com>
> Cc: Mario Limonciello <mario.limoncie...@amd.com>
> Cc: Sonny Jiang <sonny.ji...@amd.com>
> Signed-off-by: Guilherme G. Piccoli <gpicc...@igalia.com>
Should have added this tag too:
Suggested-by: Alexander Deucher <alexander.deuc...@amd.com>
Looks good to me, thanks!
Reviewed-by: Mario Limonciello <mario.limoncie...@amd.com>
> ---
>
>
> V2:
> * Changed the approach after ML discussion- instead of cleaning up
> the switch statement, removed it entirely - special thanks to Alex
> and Mario for the feedback!
>
> Notice that patch 3 was dropped from this series after reviews.
>
>
> drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 81 +------------------------
> 1 file changed, 3 insertions(+), 78 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> index 1b1a3c9e1863..02d428ddf2f8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> @@ -110,84 +110,9 @@ int amdgpu_vcn_sw_init(struct amdgpu_device
> *adev)
> for (i = 0; i < adev->vcn.num_vcn_inst; i++)
> atomic_set(&adev->vcn.inst[i].dpg_enc_submission_cnt, 0);
>
> - switch (adev->ip_versions[UVD_HWIP][0]) {
> - case IP_VERSION(1, 0, 0):
> - case IP_VERSION(1, 0, 1):
> - case IP_VERSION(2, 5, 0):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(2, 2, 0):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(2, 6, 0):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(2, 0, 0):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(2, 0, 2):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(3, 0, 0):
> - case IP_VERSION(3, 0, 64):
> - case IP_VERSION(3, 0, 192):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(3, 0, 2):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(3, 0, 16):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(3, 0, 33):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(3, 1, 1):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(3, 1, 2):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(4, 0, 0):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(4, 0, 2):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - case IP_VERSION(4, 0, 4):
> - if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
> &&
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> - adev->vcn.indirect_sram = true;
> - break;
> - default:
> - return -EINVAL;
> - }
> + if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
> + (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
> + adev->vcn.indirect_sram = true;
>
> hdr = (const struct common_firmware_header *)adev->vcn.fw-
> >data;
> adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version);
> --
> 2.39.0
