From: Taimur Hassan <syed.has...@amd.com>
[Why & How]
Add addtional check in CalculateODMMode for cases where the ODM combine
is needed due to number of DSC slices.
Reviewed-by: Alvin Lee <alvin.l...@amd.com>
Acked-by: Brian Chang <brian.ch...@amd.com>
Signed-off-by: Taimur Hassan <syed.has...@amd.com>
---
.../gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 2 ++
.../amd/display/dc/dml/dcn32/display_mode_vba_util_32.c | 7 +++++--
.../amd/display/dc/dml/dcn32/display_mode_vba_util_32.h | 1 +
3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index cb2025771646..f831855db022 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -2045,6 +2045,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading,
mode_lib->vba.DISPCLKRampingMargin,
mode_lib->vba.DISPCLKDPPCLKVCOSpeed,
+
mode_lib->vba.NumberOfDSCSlices[k],
/* Output */
&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.TotalAvailablePipesSupportNoDSC,
@@ -2066,6 +2067,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading,
mode_lib->vba.DISPCLKRampingMargin,
mode_lib->vba.DISPCLKDPPCLKVCOSpeed,
+
mode_lib->vba.NumberOfDSCSlices[k],
/* Output */
&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.TotalAvailablePipesSupportDSC,
diff --git
a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
index 05fc14a47fba..6b3c4dbb140b 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
@@ -1193,6 +1193,7 @@ void dml32_CalculateODMMode(
double DISPCLKDPPCLKDSCCLKDownSpreading,
double DISPCLKRampingMargin,
double DISPCLKDPPCLKVCOSpeed,
+ unsigned int NumberOfDSCSlices,
/* Output */
bool *TotalAvailablePipesSupport,
@@ -1228,7 +1229,8 @@ void dml32_CalculateODMMode(
if (!(Output == dm_hdmi || Output == dm_dp || Output == dm_edp) &&
(ODMUse == dm_odm_combine_policy_4to1 ||
((SurfaceRequiredDISPCLKWithODMCombineTwoToOne >
StateDispclk ||
- (DSCEnable && (HActive > 2 *
MaximumPixelsPerLinePerDSCUnit)))))) {
+ (DSCEnable && (HActive > 2 *
MaximumPixelsPerLinePerDSCUnit))
+ || NumberOfDSCSlices > 8)))) {
if (TotalNumberOfActiveDPP + 4 <= MaxNumDPP) {
*ODMMode = dm_odm_combine_mode_4to1;
*RequiredDISPCLKPerSurface =
SurfaceRequiredDISPCLKWithODMCombineFourToOne;
@@ -1239,7 +1241,8 @@ void dml32_CalculateODMMode(
} else if (Output != dm_hdmi && (ODMUse == dm_odm_combine_policy_2to1 ||
(((SurfaceRequiredDISPCLKWithoutODMCombine >
StateDispclk &&
SurfaceRequiredDISPCLKWithODMCombineTwoToOne <= StateDispclk) ||
- (DSCEnable && (HActive >
MaximumPixelsPerLinePerDSCUnit)))))) {
+ (DSCEnable && (HActive >
MaximumPixelsPerLinePerDSCUnit))
+ || (NumberOfDSCSlices <= 8 &&
NumberOfDSCSlices > 4))))) {
if (TotalNumberOfActiveDPP + 2 <= MaxNumDPP) {
*ODMMode = dm_odm_combine_mode_2to1;
*RequiredDISPCLKPerSurface =
SurfaceRequiredDISPCLKWithODMCombineTwoToOne;
diff --git
a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
index d293856ba906..626f6605e2d5 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
@@ -226,6 +226,7 @@ void dml32_CalculateODMMode(
double DISPCLKDPPCLKDSCCLKDownSpreading,
double DISPCLKRampingMargin,
double DISPCLKDPPCLKVCOSpeed,
+ unsigned int NumberOfDSCSlices,
/* Output */
bool *TotalAvailablePipesSupport,
--
2.25.1
