[PATCH 18/43] drm/amd/display: Add guard for FCLK pstate message to PMFW for DCN321

[Alex Deucher]

From: Dillon Varone <dillon.var...@amd.com>

[WHY?]
DCN321 does not support FCLK DPM, and thus it should not send messages to
PMFW regarding it.

Signed-off-by: Dillon Varone <dillon.var...@amd.com>
Acked-by: Jerry Zuo <jerry....@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c 
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
index 419cc83b3d21..4ff12b816614 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
@@ -346,7 +346,8 @@ static void dcn32_update_clocks(struct clk_mgr 
*clk_mgr_base,
                                        
clk_mgr_base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries
 - 1].memclk_mhz);
        }
 
-       if (should_update_pstate_support(safe_to_lower, 
fclk_p_state_change_support, clk_mgr_base->clks.fclk_p_state_change_support)) {
+       if (should_update_pstate_support(safe_to_lower, 
fclk_p_state_change_support, clk_mgr_base->clks.fclk_p_state_change_support) &&
+                       clk_mgr_base->ctx->dce_version != DCN_VERSION_3_21) {
                clk_mgr_base->clks.fclk_p_state_change_support = 
fclk_p_state_change_support;
 
                /* To disable FCLK P-state switching, send 
FCLK_PSTATE_NOTSUPPORTED message to PMFW */
-- 
2.35.3