[PATCH 13/17] drm/amd/display: PSRSU+DSC WA for specific TCON

[David Zhang]

[why]
Some specific TCON chip has HW limitation to support PSRSU+DSC.

[how]
Force ffu mode when DSC enabled if we detect it is the specific
model from sink OUI DPCD. And disable ABM update for this case.

Signed-off-by: David Zhang <dingchen.zh...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dc_link.h      |  1 +
 drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 14 ++++++++++++++
 2 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dc_link.h 
b/drivers/gpu/drm/amd/display/dc/dc_link.h
index a3c37ee3f849..0bec986a6de8 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_link.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_link.h
@@ -108,6 +108,7 @@ struct psr_settings {
         */
        bool psr_frame_capture_indication_req;
        unsigned int psr_sdp_transmit_line_num_deadline;
+       uint8_t force_ffu_mode;
        unsigned int psr_power_opt;
 };
 
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c 
b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
index e784002fe312..9ca0cbb0af9b 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
@@ -349,6 +349,7 @@ static bool dmub_psr_copy_settings(struct dmub_psr *dmub,
        copy_settings_data->debug.u32All = 0;
        copy_settings_data->debug.bitfields.visual_confirm      = 
dc->dc->debug.visual_confirm == VISUAL_CONFIRM_PSR;
        copy_settings_data->debug.bitfields.use_hw_lock_mgr             = 1;
+       copy_settings_data->debug.bitfields.force_full_frame_update     = 0;
 
        if (psr_context->su_granularity_required == 0)
                copy_settings_data->su_y_granularity = 0;
@@ -363,6 +364,19 @@ static bool dmub_psr_copy_settings(struct dmub_psr *dmub,
        copy_settings_data->panel_inst = panel_inst;
        copy_settings_data->dsc_enable_status = 
(pipe_ctx->stream->timing.flags.DSC == 1);
 
+       /**
+        * WA for PSRSU+DSC on specific TCON, if DSC is enabled, force PSRSU as 
ffu mode(full frame update)
+        * Note that PSRSU+DSC is still under development.
+        */
+       if (copy_settings_data->dsc_enable_status &&
+               link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 &&
+               !memcmp(link->dpcd_caps.sink_dev_id_str, 
DP_SINK_DEVICE_STR_ID_1,
+                       sizeof(link->dpcd_caps.sink_dev_id_str)))
+               link->psr_settings.force_ffu_mode = 1;
+       else
+               link->psr_settings.force_ffu_mode = 0;
+       copy_settings_data->force_ffu_mode = link->psr_settings.force_ffu_mode;
+
        if (link->fec_state == dc_link_fec_enabled &&
                (!memcmp(link->dpcd_caps.sink_dev_id_str, 
DP_SINK_DEVICE_STR_ID_1,
                        sizeof(link->dpcd_caps.sink_dev_id_str)) ||
-- 
2.25.1