Re: [PATCH] drm/amdgpu: update RLC_PG_DELAY_3 Value to 200us for yellow carp

[Huang Rui]

On Tue, Nov 02, 2021 at 04:51:18PM +0800, Liu, Aaron wrote:
> For yellow carp, the desired CGPG hysteresis value is 0x4E20.
> 
> Signed-off-by: Aaron Liu <aaron....@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index 90a834dc4008..b53b36f5ae92 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -8316,11 +8316,8 @@ static void gfx_v10_cntl_power_gating(struct 
> amdgpu_device *adev, bool enable)
>       if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) {
>               switch (adev->ip_versions[GC_HWIP][0]) {
>               case IP_VERSION(10, 3, 1):
> -                     data = 0x4E20 & 
> RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;
> -                     WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data);
> -                     break;
>               case IP_VERSION(10, 3, 3):
> -                     data = 0x1388 & 
> RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;
> +                     data = 0x4E20 & 
> RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;

Acked-by: Huang Rui <ray.hu...@amd.com>

Is this patch able to fix the cgpg issue in ROCr test?

Thanks,
Ray