From: Jake Wang <haonan.wa...@amd.com>

[Why]
bios_golden_init will override dccg_init during init_hw.

[How]
Move dccg_init to after bios_golden_init.

Reviewed-by: Aric Cyr <aric....@amd.com>
Reviewed-by: Eric Yang <eric.ya...@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutier...@amd.com>
Signed-off-by: Jake Wang <haonan.wa...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c
index 65f66687af4c..186d08aec812 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c
@@ -77,10 +77,6 @@ void dcn31_init_hw(struct dc *dc)
        if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks)
                dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);
 
-       // Initialize the dccg
-       if (res_pool->dccg->funcs->dccg_init)
-               res_pool->dccg->funcs->dccg_init(res_pool->dccg);
-
        if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
 
                REG_WRITE(REFCLK_CNTL, 0);
@@ -107,6 +103,9 @@ void dcn31_init_hw(struct dc *dc)
                hws->funcs.bios_golden_init(dc);
                hws->funcs.disable_vga(dc->hwseq);
        }
+       // Initialize the dccg
+       if (res_pool->dccg->funcs->dccg_init)
+               res_pool->dccg->funcs->dccg_init(res_pool->dccg);
 
        if (dc->debug.enable_mem_low_power.bits.dmcu) {
                // Force ERAM to shutdown if DMCU is not enabled
-- 
2.25.1

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