From: Jimmy Kizito <jimmy.kiz...@amd.com>
[Why]
Training settings need to be applied to DPIA link at start of each
training loop. Note: FEC readiness should be configured before link
training while FEC enablement should be configured once training is
complete.
[How]
- Implement DPIA link configuration function.
- Account for dynamically assigned link encoders during link
configuration.
Reviewed-by: Jun Lei <jun....@amd.com>
Acked-by: Wayne Lin <wayne....@amd.com>
Acked-by: Nicholas Kazlauskas <nicholas.kazlaus...@amd.com>
Signed-off-by: Jimmy Kizito <jimmy.kiz...@amd.com>
---
.../drm/amd/display/dc/core/dc_link_dpia.c | 49 ++++++++++++++++---
.../display/dc/dcn31/dcn31_dio_link_encoder.c | 2 +
2 files changed, 45 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
index 4e9bbc9180d0..5ffaf6ca372b 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
@@ -29,6 +29,9 @@
#include "dc_link.h"
#include "dc_link_dp.h"
+#define DC_LOGGER \
+ link->ctx->logger
+
enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link)
{
/** @todo Read corresponding DPCD region and update link caps. */
@@ -37,17 +40,51 @@ enum dc_status dpcd_get_tunneling_device_data(struct
dc_link *link)
/* Configure link as prescribed in link_setting; set LTTPR mode; and
* Initialize link training settings.
+ * Abort link training if sink unplug detected.
+ *
+ * @param link DPIA link being trained.
+ * @param[in] link_setting Lane count, link rate and downspread control.
+ * @param[out] lt_settings Link settings and drive settings (voltage swing and
pre-emphasis).
*/
static enum link_training_result dpia_configure_link(struct dc_link *link,
const struct dc_link_settings *link_setting,
struct link_training_settings *lt_settings)
{
- enum link_training_result result;
-
- /** @todo Fail until implemented. */
- result = LINK_TRAINING_ABORT;
-
- return result;
+ enum dc_status status;
+ bool fec_enable;
+
+ DC_LOG_HW_LINK_TRAINING("%s\n DPIA(%d) configuring\n - LTTPR
mode(%d)\n",
+ __func__,
+ link->link_id.enum_id - ENUM_ID_1,
+ link->lttpr_mode);
+
+ dp_decide_training_settings(link,
+ link_setting,
+ lt_settings);
+
+ status = dpcd_configure_channel_coding(link, lt_settings);
+ if (status != DC_OK && !link->hpd_status)
+ return LINK_TRAINING_ABORT;
+
+ /* Configure lttpr mode */
+ status = dpcd_configure_lttpr_mode(link, lt_settings);
+ if (status != DC_OK && !link->hpd_status)
+ return LINK_TRAINING_ABORT;
+
+ /* Set link rate, lane count and spread. */
+ status = dpcd_set_link_settings(link, lt_settings);
+ if (status != DC_OK && !link->hpd_status)
+ return LINK_TRAINING_ABORT;
+
+ if (link->preferred_training_settings.fec_enable)
+ fec_enable = *link->preferred_training_settings.fec_enable;
+ else
+ fec_enable = true;
+ status = dp_set_fec_ready(link, fec_enable);
+ if (status != DC_OK && !link->hpd_status)
+ return LINK_TRAINING_ABORT;
+
+ return LINK_TRAINING_SUCCESS;
}
/* Execute clock recovery phase of link training for specified hop in display
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
index f86d4446f347..a5266d5999d7 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
@@ -428,6 +428,7 @@ void dcn31_link_encoder_enable_dp_output(
if (link) {
dpia_control.dpia_id = link->ddc_hw_inst;
+ dpia_control.fec_rdy = link->fec_state ==
dc_link_fec_ready ? 1 : 0;
} else {
DC_LOG_ERROR("%s: Failed to execute DPIA enable DMUB
command.\n", __func__);
BREAK_TO_DEBUGGER();
@@ -469,6 +470,7 @@ void dcn31_link_encoder_enable_dp_mst_output(
if (link) {
dpia_control.dpia_id = link->ddc_hw_inst;
+ dpia_control.fec_rdy = link->fec_state ==
dc_link_fec_ready ? 1 : 0;
} else {
DC_LOG_ERROR("%s: Failed to execute DPIA enable DMUB
command.\n", __func__);
BREAK_TO_DEBUGGER();
--
2.25.1
