On Thu, Sep 16, 2021, 2:12 AM Marek Olšák <mar...@gmail.com> wrote:
> Based on the discussions we had about displayable DCC internally, only > MAX_COMPRESSED_BLOCK = 64B with both DCC_INDEPENDENT_64B_BLOCKS and > DCC_INDEPENDENT_128B_BLOCKS is supported by DCN on RDNA 2. > > Is there something new on the hardware side that I missed? > Per the comments you put in mesa that was only needed for 4k? https://gitlab.freedesktop.org/mesa/mesa/-/blob/main/src/amd/common/ac_surface.c#L1444 > Marek > > On Tue, Sep 14, 2021 at 7:59 PM Joshua Ashton <jos...@froggi.es> wrote: > >> Some games, ie. Doom Eternal, present from compute following compute >> post-fx and would benefit from having DCC image stores available. >> >> DCN on gfx10_3 doesn't need INDEPENDENT_128B_BLOCKS = 0 so we can expose >> these modifiers capable of DCC image stores. >> >> Signed-off-by: Joshua Ashton <jos...@froggi.es> >> Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> >> --- >> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 +++++++++++++++++++ >> 1 file changed, 21 insertions(+) >> >> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c >> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c >> index 2a24e43623cb..a4e33a4336a0 100644 >> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c >> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c >> @@ -4817,6 +4817,16 @@ add_gfx10_3_modifiers(const struct amdgpu_device >> *adev, >> AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) | >> AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, >> AMD_FMT_MOD_DCC_BLOCK_64B)); >> >> + add_modifier(mods, size, capacity, AMD_FMT_MOD | >> + AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) | >> + AMD_FMT_MOD_SET(TILE_VERSION, >> AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) | >> + AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits) | >> + AMD_FMT_MOD_SET(PACKERS, pkrs) | >> + AMD_FMT_MOD_SET(DCC, 1) | >> + AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1) | >> + AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) | >> + AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, >> AMD_FMT_MOD_DCC_BLOCK_128B)); >> + >> add_modifier(mods, size, capacity, AMD_FMT_MOD | >> AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) | >> AMD_FMT_MOD_SET(TILE_VERSION, >> AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) | >> @@ -4829,6 +4839,17 @@ add_gfx10_3_modifiers(const struct amdgpu_device >> *adev, >> AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) | >> AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, >> AMD_FMT_MOD_DCC_BLOCK_64B)); >> >> + add_modifier(mods, size, capacity, AMD_FMT_MOD | >> + AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) | >> + AMD_FMT_MOD_SET(TILE_VERSION, >> AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) | >> + AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits) | >> + AMD_FMT_MOD_SET(PACKERS, pkrs) | >> + AMD_FMT_MOD_SET(DCC, 1) | >> + AMD_FMT_MOD_SET(DCC_RETILE, 1) | >> + AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1) | >> + AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) | >> + AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, >> AMD_FMT_MOD_DCC_BLOCK_128B)); >> + >> add_modifier(mods, size, capacity, AMD_FMT_MOD | >> AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) | >> AMD_FMT_MOD_SET(TILE_VERSION, >> AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) | >> -- >> 2.33.0 >> >>
