[PATCH v2 3/3] drm/amdgpu:schedule vce/vcn encode based on priority

[Satyajit Sahu]

Schedule the encode job in VCE/VCN encode ring
based on the priority set by UMD.

Signed-off-by: Satyajit Sahu <satyajit.s...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0d1928260650..468003583b2a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -120,6 +120,18 @@ static enum amdgpu_gfx_pipe_priority 
amdgpu_ctx_prio_to_compute_prio(int32_t pri
        }
 }
 
+static enum amdgpu_ring_priority_level 
amdgpu_ctx_sched_prio_to_ring_prio(int32_t prio)
+{
+       switch (prio) {
+       case AMDGPU_CTX_PRIORITY_HIGH:
+               return AMDGPU_RING_PRIO_1;
+       case AMDGPU_CTX_PRIORITY_VERY_HIGH:
+               return AMDGPU_RING_PRIO_2;
+       default:
+               return AMDGPU_RING_PRIO_0;
+       }
+}
+
 static unsigned int amdgpu_ctx_get_hw_prio(struct amdgpu_ctx *ctx, u32 hw_ip)
 {
        struct amdgpu_device *adev = ctx->adev;
@@ -133,6 +145,10 @@ static unsigned int amdgpu_ctx_get_hw_prio(struct 
amdgpu_ctx *ctx, u32 hw_ip)
        case AMDGPU_HW_IP_COMPUTE:
                hw_prio = amdgpu_ctx_prio_to_compute_prio(ctx_prio);
                break;
+       case AMDGPU_HW_IP_VCE:
+       case AMDGPU_HW_IP_VCN_ENC:
+               hw_prio = amdgpu_ctx_sched_prio_to_ring_prio(ctx_prio);
+               break;
        default:
                hw_prio = AMDGPU_RING_PRIO_DEFAULT;
                break;
-- 
2.25.1