From: Martin Tsai <martin.t...@amd.com>
[Why]
The voltage swing has to start from the minimum level when transmit TPS1 over
Main-Link in clock recovery sequence.
The lane settings from current design will inherit the existing VS/PE values
that could be adjusted by Repeater X, and to use the adjusted voltage swing
level
in Repeater X-1 or DPRX could violate DP specs.
[How]
To reset VS from lane settings after LTTPRs have been trained to meet the
requirement.
Signed-off-by: Martin Tsai <martin.t...@amd.com>
Reviewed-by: Wenjing Liu <wenjing....@amd.com>
Acked-by: Bindu Ramamurthy <bind...@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 5ecbe525b676..4326ac577756 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1664,6 +1664,7 @@ static enum link_training_result
dp_perform_8b_10b_link_training(
uint8_t repeater_cnt;
uint8_t repeater_id;
+ uint8_t lane = 0;
if (link->ctx->dc->work_arounds.lt_early_cr_pattern)
start_clock_recovery_pattern_early(link, lt_settings, DPRX);
@@ -1694,6 +1695,9 @@ static enum link_training_result
dp_perform_8b_10b_link_training(
repeater_training_done(link, repeater_id);
}
+
+ for (lane = 0; lane <
(uint8_t)lt_settings->link_settings.lane_count; lane++)
+ lt_settings->lane_settings[lane].VOLTAGE_SWING =
VOLTAGE_SWING_LEVEL0;
}
if (status == LINK_TRAINING_SUCCESS) {
--
2.25.1
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