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Series is
Reviewed-by: Hawking Zhang <hawking.zh...@amd.com>
Regards,
Hawking
-----Original Message-----
From: Feifei Xu <feifei...@amd.com>
Sent: Sunday, April 25, 2021 16:00
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking <hawking.zh...@amd.com>; Xu, Feifei <feifei...@amd.com>
Subject: [PATCH 2/2] drm/amdgpu: Correct and simplify sdma 4.x irq.num_types
Correct and init the sdma4.x irq.num_types.
Signed-off-by: Feifei Xu <feifei...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 29 ++++++++------------------
1 file changed, 9 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 7870fd09d98d..8a9b194b5826 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -2601,33 +2601,22 @@ static const struct amdgpu_irq_src_funcs
sdma_v4_0_srbm_write_irq_funcs = {
static void sdma_v4_0_set_irq_funcs(struct amdgpu_device *adev) {
+ adev->sdma.trap_irq.num_types = adev->sdma.num_instances;
+ adev->sdma.ecc_irq.num_types = adev->sdma.num_instances;
+
+ /*For Arcturus and Aldebaran, add another 4 irq handler*/
switch (adev->sdma.num_instances) {
- case 1:
- adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1;
- adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1;
- break;
case 5:
- adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE5;
- adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE5;
- adev->sdma.vm_hole_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE5;
- adev->sdma.doorbell_invalid_irq.num_types =
AMDGPU_SDMA_IRQ_INSTANCE5;
- adev->sdma.pool_timeout_irq.num_types =
AMDGPU_SDMA_IRQ_INSTANCE5;
- adev->sdma.srbm_write_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE5;
- break;
case 8:
- adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE7;
- adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE7;
- adev->sdma.vm_hole_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE7;
- adev->sdma.doorbell_invalid_irq.num_types =
AMDGPU_SDMA_IRQ_INSTANCE7;
- adev->sdma.pool_timeout_irq.num_types =
AMDGPU_SDMA_IRQ_INSTANCE7;
- adev->sdma.srbm_write_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE7;
+ adev->sdma.vm_hole_irq.num_types = adev->sdma.num_instances;
+ adev->sdma.doorbell_invalid_irq.num_types =
adev->sdma.num_instances;
+ adev->sdma.pool_timeout_irq.num_types =
adev->sdma.num_instances;
+ adev->sdma.srbm_write_irq.num_types = adev->sdma.num_instances;
break;
- case 2:
default:
- adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE2;
- adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE2;
break;
}
+
adev->sdma.trap_irq.funcs = &sdma_v4_0_trap_irq_funcs;
adev->sdma.illegal_inst_irq.funcs = &sdma_v4_0_illegal_inst_irq_funcs;
adev->sdma.ecc_irq.funcs = &sdma_v4_0_ecc_irq_funcs;
--
2.25.1
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