From: Anthony Koo <anthony....@amd.com>
Signed-off-by: Anthony Koo <anthony....@amd.com>
Reviewed-by: Anthony Koo <anthony....@amd.com>
Acked-by: Wayne Lin <wayne...@amd.com>
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 82c6e8a8a7c9..95fab1d3d7af 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -47,10 +47,10 @@
/* Firmware versioning. */
#ifdef DMUB_EXPOSE_VERSION
-#define DMUB_FW_VERSION_GIT_HASH 0x23db9b126
+#define DMUB_FW_VERSION_GIT_HASH 0x41548deb6
#define DMUB_FW_VERSION_MAJOR 0
#define DMUB_FW_VERSION_MINOR 0
-#define DMUB_FW_VERSION_REVISION 62
+#define DMUB_FW_VERSION_REVISION 63
#define DMUB_FW_VERSION_TEST 0
#define DMUB_FW_VERSION_VBIOS 0
#define DMUB_FW_VERSION_HOTFIX 0
@@ -117,6 +117,8 @@
/* Maximum number of planes on any ASIC. */
#define DMUB_MAX_PLANES 6
+#define DMUB_MAX_SUBVP_STREAMS 2
+
/* Trace buffer offset for entry */
#define TRACE_BUFFER_ENTRY_OFFSET 16
@@ -328,7 +330,8 @@ union dmub_fw_boot_options {
uint32_t skip_phy_access : 1; /**< 1 if PHY access should be
skipped */
uint32_t disable_clk_gate: 1; /**< 1 if clock gating should be
disabled */
uint32_t skip_phy_init_panel_sequence: 1; /**< 1 to skip panel
init seq */
- uint32_t reserved : 26; /**< reserved */
+ uint32_t reserved_unreleased: 1; /**< reserved for an
unreleased feature */
+ uint32_t reserved : 25; /**< reserved */
} bits; /**< boot bits */
uint32_t all; /**< 32-bit access to bits */
};
--
2.17.1
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