[AMD Official Use Only - Internal Distribution Only] Hello Christian,
Thanks for your information. We add this due to sdma0 timeout during S3 stress test. Will update this for other cases in v2. Regards, Joe -----Original Message----- From: Christian König <ckoenig.leichtzumer...@gmail.com> Sent: Tuesday, April 20, 2021 2:39 PM To: Su, Jinzhou (Joe) <jinzhou...@amd.com>; amd-gfx@lists.freedesktop.org Cc: Huang, Ray <ray.hu...@amd.com> Subject: Re: [PATCH] drm/amdgpu: Add mem sync flag for SDMA IB test Am 20.04.21 um 04:23 schrieb Jinzhou Su: > The buffer for SDMA IB test is allocated by sa bo which may be used by > other purpose. Better to flush the cache before commit the IB. Good point, but shouldn't we do this for a lot of other cases as well? I think the only place where we should not set the flag is in the CS IOCTL. Regards, Christian. > > Signed-off-by: Jinzhou Su <jinzhou...@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c > b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c > index b1ad9e52b234..da67f440b102 100644 > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c > @@ -1000,6 +1000,7 @@ static int sdma_v5_2_ring_test_ib(struct amdgpu_ring > *ring, long timeout) > ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); > ib.length_dw = 8; > > + ib.flags = AMDGPU_IB_FLAG_EMIT_MEM_SYNC; > r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); > if (r) > goto err1; _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
