[AMD Public Use]
Thanks Alex and Luben.
I've addressed the comments and pushed the changes.
Rohit
-----Original Message-----
From: Tuikov, Luben <luben.tui...@amd.com>
Sent: March 29, 2021 11:54 AM
To: Khaire, Rohit <rohit.kha...@amd.com>; amd-gfx@lists.freedesktop.org; Chang,
HaiJun <haijun.ch...@amd.com>; Ming, Davis <davis.m...@amd.com>; Liu, Monk
<monk....@amd.com>
Cc: Koenig, Christian <christian.koe...@amd.com>; Deucher, Alexander
<alexander.deuc...@amd.com>; Xiao, Jack <jack.x...@amd.com>; Zhang, Hawking
<hawking.zh...@amd.com>; Xu, Feifei <feifei...@amd.com>; Wang, Kevin(Yang)
<kevin1.w...@amd.com>
Subject: Re: [PATCH] drm/amdgpu: Add new PF2VF flags for VF register access
method
On 2021-03-23 4:44 p.m., Rohit Khaire wrote:
> Add 3 sub flags to notify guest for indirect access of gc, mmhub and ih
>
> Signed-off-by: Rohit Khaire <rohit.kha...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 11 +++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h | 17 +++++++++++++++--
> 2 files changed, 26 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
> index 8dd624c20f89..0224f352d060 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
> @@ -104,6 +104,17 @@ enum AMDGIM_FEATURE_FLAG {
> AMDGIM_FEATURE_GIM_MM_BW_MGR = 0x8,
> /* PP ONE VF MODE in GIM */
> AMDGIM_FEATURE_PP_ONE_VF = (1 << 4),
> + /* Indirect Reg Access enabled */
> + AMDGIM_FETURE_INDIRECT_REG_ACCESS = (1 << 5),
Spelling: FETURE --> FEATURE
> +};
> +
> +enum AMDGIM_REG_ACCESS_FLAG {
> + /* Use PSP to program IH_RB_CNTL */
> + AMDGIM_FEATURE_IH_REG_PSP_EN = (1 << 0),
> + /* Use RLC to program MMHUB regs */
> + AMDGIM_FEATURE_RLC_MMHUB_EN = (1 << 1),
> + /* Use RLC to program GC regs */
> + AMDGIM_FEATURE_RLC_GC_EN = (1 << 2),
> };
>
> struct amdgim_pf2vf_info_v1 {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
> b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
> index 5355827ed0ae..7fed6377d931 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
> @@ -90,11 +90,22 @@ union amd_sriov_msg_feature_flags {
> uint32_t host_flr_vramlost : 1;
> uint32_t mm_bw_management : 1;
> uint32_t pp_one_vf_mode : 1;
> - uint32_t reserved : 27;
> + uint32_t reg_indirect_acc : 1;
> + uint32_t reserved : 26;
> } flags;
> uint32_t all;
> };
>
> +union amd_sriov_reg_access_flags {
> + struct {
> + uint32_t vf_reg_access_ih : 1;
> + uint32_t vf_reg_access_mmhub : 1;
> + uint32_t vf_reg_access_gc : 1;
> + uint32_t reserved : 29;
> + } flags;
> + uint32_t all;
> +};
> +
> union amd_sriov_msg_os_info {
> struct {
> uint32_t windows : 1;
> @@ -149,8 +160,10 @@ struct amd_sriov_msg_pf2vf_info {
> /* identification in ROCm SMI */
> uint64_t uuid;
> uint32_t fcn_idx;
> + /* flags to indicate which register access method VF should use */
> + union amd_sriov_reg_access_flags reg_access_flags;
"to" --> "which" to become
/* flags which indicate the register access method VF should use */
With these fixed, and Alex's comments addressed, this patch is:
Acked-by: Luben Tuikov <luben.tui...@amd.com>
Regards,
Luben
> /* reserved */
> - uint32_t reserved[256-26];
> + uint32_t reserved[256-27];
> };
>
> struct amd_sriov_msg_vf2pf_info_header {
>
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