RE: [PATCH] drm/amd/pm: correct the watermark settings for Polaris

[Xu, Feifei]

[AMD Official Use Only - Internal Distribution Only]

Reviewed-by: Feifei Xu <feifei...@amd.com>

-----Original Message-----
From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> On Behalf Of Evan Quan
Sent: Friday, March 5, 2021 2:25 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <alexander.deuc...@amd.com>; Georgios Toptsidis 
<gtopt...@gmail.com>; Quan, Evan <evan.q...@amd.com>; Chen, Guchun 
<guchun.c...@amd.com>
Subject: [PATCH] drm/amd/pm: correct the watermark settings for Polaris

The "/ 10" should be applied to the right-hand operand instead of the left-hand 
one.

Change-Id: Ie730a1981aa5dee45cd6c3efccc7fb0f088cd679
Signed-off-by: Evan Quan <evan.q...@amd.com>
Noticed-by: Georgios Toptsidis <gtopt...@gmail.com>
---
 drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c 
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index c57dc9ae81f2..a2681fe875ed 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -5216,10 +5216,10 @@ static int smu7_set_watermarks_for_clocks_ranges(struct 
pp_hwmgr *hwmgr,
 for (j = 0; j < dep_sclk_table->count; j++) {
 valid_entry = false;
 for (k = 0; k < watermarks->num_wm_sets; k++) {
-if (dep_sclk_table->entries[i].clk / 10 >= 
watermarks->wm_clk_ranges[k].wm_min_eng_clk_in_khz &&
-    dep_sclk_table->entries[i].clk / 10 < 
watermarks->wm_clk_ranges[k].wm_max_eng_clk_in_khz &&
-    dep_mclk_table->entries[i].clk / 10 >= 
watermarks->wm_clk_ranges[k].wm_min_mem_clk_in_khz &&
-    dep_mclk_table->entries[i].clk / 10 < 
watermarks->wm_clk_ranges[k].wm_max_mem_clk_in_khz) {
+if (dep_sclk_table->entries[i].clk >= 
watermarks->wm_clk_ranges[k].wm_min_eng_clk_in_khz / 10 &&
+    dep_sclk_table->entries[i].clk < 
watermarks->wm_clk_ranges[k].wm_max_eng_clk_in_khz / 10 &&
+    dep_mclk_table->entries[i].clk >= 
watermarks->wm_clk_ranges[k].wm_min_mem_clk_in_khz / 10 &&
+    dep_mclk_table->entries[i].clk <
+watermarks->wm_clk_ranges[k].wm_max_mem_clk_in_khz / 10) {
 valid_entry = true;
 table->DisplayWatermark[i][j] = watermarks->wm_clk_ranges[k].wm_set_id;
 break;
--
2.29.0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CFeifei.Xu%40amd.com%7C629b5ae589cd43f4506f08d8df9f80d2%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637505223446156243%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=I7hiICVKpvwlZtmT302%2BLJJPo8RLa6yu37EuJDOotHg%3D&amp;reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx