From: "Max.Tseng" <max.ts...@amd.com>
[why]
Add flag to build infopacket in SDP v1.3 format
Signed-off-by: Max.Tseng <max.ts...@amd.com>
Reviewed-by: Anthony Koo <anthony....@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++-
.../amd/display/modules/freesync/freesync.c | 28 +++++++++++++++++--
.../amd/display/modules/inc/mod_freesync.h | 3 +-
3 files changed, 31 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index d639c4b52400..bd77519440e3 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -7852,6 +7852,7 @@ static void update_freesync_state_on_stream(
struct amdgpu_device *adev = dm->adev;
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(new_crtc_state->base.crtc);
unsigned long flags;
+ bool pack_sdp_v1_3 = false;
if (!new_stream)
return;
@@ -7893,7 +7894,8 @@ static void update_freesync_state_on_stream(
&vrr_params,
PACKET_TYPE_VRR,
TRANSFER_FUNC_UNKNOWN,
- &vrr_infopacket);
+ &vrr_infopacket,
+ pack_sdp_v1_3);
new_crtc_state->freesync_timing_changed |=
(memcmp(&acrtc->dm_irq_params.vrr_params.adjust,
diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
index 4762273b5bb9..e5f9d7704a63 100644
--- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
+++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
@@ -903,12 +903,31 @@ static void build_vrr_infopacket_v3(enum signal_type
signal,
infopacket->valid = true;
}
+static void build_vrr_infopacket_sdp_v1_3(enum vrr_packet_type packet_type,
+
struct dc_info_packet *infopacket)
+{
+ uint8_t idx = 0, size = 0;
+
+ size = ((packet_type == PACKET_TYPE_FS_V1) ? 0x08 :
+ (packet_type == PACKET_TYPE_FS_V3) ? 0x10 :
+
0x09);
+
+ for (idx = infopacket->hb2; idx > 1; idx--) // Data Byte Count: 0x1B
+ infopacket->sb[idx] = infopacket->sb[idx-1];
+
+ infopacket->sb[1] = size; // Length
+ infopacket->sb[0] = (infopacket->hb3 >> 2) & 0x3F;//Version
+ infopacket->hb3 = (0x13 << 2); // Header,SDP 1.3
+ infopacket->hb2 = 0x1D;
+}
+
void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync,
const struct dc_stream_state *stream,
const struct mod_vrr_params *vrr,
enum vrr_packet_type packet_type,
enum color_transfer_func app_tf,
- struct dc_info_packet *infopacket)
+ struct dc_info_packet *infopacket,
+ bool pack_sdp_v1_3)
{
/* SPD info packet for FreeSync
* VTEM info packet for HdmiVRR
@@ -941,6 +960,12 @@ void mod_freesync_build_vrr_infopacket(struct mod_freesync
*mod_freesync,
default:
build_vrr_infopacket_v1(stream->signal, vrr, infopacket);
}
+
+ if (true == pack_sdp_v1_3 &&
+ true == dc_is_dp_signal(stream->signal) &&
+ packet_type != PACKET_TYPE_VRR &&
+ packet_type != PACKET_TYPE_VTEM)
+ build_vrr_infopacket_sdp_v1_3(packet_type, infopacket);
}
void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
@@ -1304,4 +1329,3 @@ bool mod_freesync_is_valid_range(uint32_t
min_refresh_cap_in_uhz,
return true;
}
-
diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h
b/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h
index c80fc10d732c..b64cd5bdc7b5 100644
--- a/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h
+++ b/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h
@@ -150,7 +150,8 @@ void mod_freesync_build_vrr_infopacket(struct mod_freesync
*mod_freesync,
const struct mod_vrr_params *vrr,
enum vrr_packet_type packet_type,
enum color_transfer_func app_tf,
- struct dc_info_packet *infopacket);
+ struct dc_info_packet *infopacket,
+ bool pack_sdp_v1_3);
void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
const struct dc_stream_state *stream,
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
