From: Yong Zhao <yong.z...@amd.com>

This gives more information and improves productivity.

Singed-off-by: Yong Zhao <yong.z...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c       | 34 +++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c        |  5 +--
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c         |  5 +--
 .../gpu/drm/amd/include/soc15_ih_clientid.h   |  8 +++--
 4 files changed, 46 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index afbbec82a289..eea2bbbbb3df 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -65,6 +65,40 @@
 
 #define AMDGPU_WAIT_IDLE_TIMEOUT 200
 
+const char *soc15_ih_clientid_name[] = {
+       "IH",
+       "SDMA2 or ACP",
+       "ATHUB",
+       "BIF",
+       "SDMA3 or DCE",
+       "SDMA4 or ISP",
+       "VMC1 or PCIE0",
+       "RLC",
+       "SDMA0",
+       "SDMA1",
+       "SE0SH",
+       "SE1SH",
+       "SE2SH",
+       "SE3SH",
+       "VCN1 or UVD1",
+       "THM",
+       "VCN or UVD",
+       "SDMA5 or VCE0",
+       "VMC",
+       "SDMA6 or XDMA",
+       "GRBM_CP",
+       "ATS",
+       "ROM_SMUIO",
+       "DF",
+       "SDMA7 or VCE1",
+       "PWR",
+       "UTCL2",
+       "EA",
+       "UTCL2LOG",
+       "MP0",
+       "MP1"
+};
+
 /**
  * amdgpu_hotplug_work_func - work handler for display hotplug event
  *
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 3b7c6c31fce1..58352ca3d4f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -152,8 +152,9 @@ static int gmc_v10_0_process_interrupt(struct amdgpu_device 
*adev,
                entry->src_id, entry->ring_id, entry->vmid,
                entry->pasid, task_info.process_name, task_info.tgid,
                task_info.task_name, task_info.pid);
-       dev_err(adev->dev, "  in page starting at address 0x%012llx from client 
%d\n",
-               addr, entry->client_id);
+       dev_err(adev->dev, "  in page starting at address 0x%016llx from client 
0x%x (%s)\n",
+               addr, entry->client_id,
+               soc15_ih_clientid_name[entry->client_id]);
 
        if (!amdgpu_sriov_vf(adev))
                hub->vmhub_funcs->print_l2_protection_fault_status(adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index d9f4955f293c..ff4a2e0a1ad6 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -521,8 +521,9 @@ static int gmc_v9_0_process_interrupt(struct amdgpu_device 
*adev,
                entry->src_id, entry->ring_id, entry->vmid,
                entry->pasid, task_info.process_name, task_info.tgid,
                task_info.task_name, task_info.pid);
-       dev_err(adev->dev, "  in page starting at address 0x%012llx from client 
%d\n",
-               addr, entry->client_id);
+       dev_err(adev->dev, "  in page starting at address 0x%016llx from IH 
client 0x%x (%s)\n",
+               addr, entry->client_id,
+               soc15_ih_clientid_name[entry->client_id]);
 
        if (amdgpu_sriov_vf(adev))
                return 0;
diff --git a/drivers/gpu/drm/amd/include/soc15_ih_clientid.h 
b/drivers/gpu/drm/amd/include/soc15_ih_clientid.h
index fb67bb55ed79..e3088c10bfff 100644
--- a/drivers/gpu/drm/amd/include/soc15_ih_clientid.h
+++ b/drivers/gpu/drm/amd/include/soc15_ih_clientid.h
@@ -24,8 +24,10 @@
 #ifndef __SOC15_IH_CLIENTID_H__
 #define __SOC15_IH_CLIENTID_H__
 
- /*
-  * vega10+ IH clients
+/*
+ * Vega10+ IH clients
+ * Whenever this structure is updated, which should not happen, make sure
+ * soc15_ih_clientid_name in the below is also updated accordingly.
  */
 enum soc15_ih_clientid {
        SOC15_IH_CLIENTID_IH            = 0x00,
@@ -74,6 +76,8 @@ enum soc15_ih_clientid {
        SOC15_IH_CLIENTID_VMC1          = SOC15_IH_CLIENTID_PCIE0,
 };
 
+extern const char *soc15_ih_clientid_name[];
+
 #endif
 
 
-- 
2.29.2

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to