That will help to determine whether 2ND_USB20_PORT workaround is
needed for Sienna Cichlid.
Change-Id: I3852e7c8cb11c12845ca81e7967e332c499cb470
Signed-off-by: Evan Quan <evan.q...@amd.com>
---
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 1 +
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 971c7fe4af37..cb96466605d5 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -227,6 +227,7 @@ struct smu_bios_boot_up_values
uint32_t content_revision;
uint32_t fclk;
uint32_t lclk;
+ uint32_t firmware_caps;
};
enum smu_table_id
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index f2565eed469f..45ecd0386e9f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -554,6 +554,7 @@ int smu_v11_0_get_vbios_bootup_values(struct smu_context
*smu)
smu->smu_table.boot_values.vdd_gfx = v_3_1->bootup_vddgfx_mv;
smu->smu_table.boot_values.cooling_id =
v_3_1->coolingsolution_id;
smu->smu_table.boot_values.pp_table_id = 0;
+ smu->smu_table.boot_values.firmware_caps =
v_3_1->firmware_capability;
break;
case 3:
default:
@@ -569,6 +570,7 @@ int smu_v11_0_get_vbios_bootup_values(struct smu_context
*smu)
smu->smu_table.boot_values.vdd_gfx = v_3_3->bootup_vddgfx_mv;
smu->smu_table.boot_values.cooling_id =
v_3_3->coolingsolution_id;
smu->smu_table.boot_values.pp_table_id =
v_3_3->pplib_pptable_id;
+ smu->smu_table.boot_values.firmware_caps =
v_3_3->firmware_capability;
}
smu->smu_table.boot_values.format_revision = header->format_revision;
--
2.29.0
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