On Tue, Nov 03, 2020 at 10:11:29PM -0500, Luben Tuikov wrote:
> Make the definition of struct drm_driver
> a constant, to follow the latest developments
> in the DRM layer.
> 
> Signed-off-by: Luben Tuikov <luben.tui...@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 32 +++++++++++++++++++++----
>  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 25 +------------------
>  2 files changed, 29 insertions(+), 28 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index e5bee56e06d1..be304df7a8c2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -40,6 +40,7 @@
>  #include "amdgpu.h"
>  #include "amdgpu_irq.h"
>  #include "amdgpu_dma_buf.h"
> +#include "amdgpu_sched.h"
>  
>  #include "amdgpu_amdkfd.h"
>  
> @@ -1105,7 +1106,7 @@ static const struct pci_device_id pciidlist[] = {
>  
>  MODULE_DEVICE_TABLE(pci, pciidlist);
>  
> -static struct drm_driver kms_driver;
> +static const struct drm_driver amdgpu_kms_driver;
>  
>  static int amdgpu_pci_probe(struct pci_dev *pdev,
>                           const struct pci_device_id *ent)
> @@ -1183,7 +1184,7 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
>       adev->dev  = &pdev->dev;
>       adev->pdev = pdev;
>       ddev = adev_to_drm(adev);
> -     ret = drm_dev_init(ddev, &kms_driver, &pdev->dev);
> +     ret = drm_dev_init(ddev, &amdgpu_kms_driver, &pdev->dev);
>       if (ret)
>               goto err_free;
>  
> @@ -1528,7 +1529,30 @@ int amdgpu_file_to_fpriv(struct file *filp, struct 
> amdgpu_fpriv **fpriv)
>       return 0;
>  }
>  
> -static struct drm_driver kms_driver = {
> +int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file 
> *filp);
> +
> +const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
> +     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_CREATE, amdgpu_gem_create_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_CTX, amdgpu_ctx_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_VM, amdgpu_vm_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_SCHED, amdgpu_sched_ioctl, DRM_MASTER),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_BO_LIST, amdgpu_bo_list_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_FENCE_TO_HANDLE, 
> amdgpu_cs_fence_to_handle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
> +     /* KMS */
> +     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_MMAP, amdgpu_gem_mmap_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_WAIT_IDLE, amdgpu_gem_wait_idle_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_CS, amdgpu_cs_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_INFO, amdgpu_info_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_WAIT_CS, amdgpu_cs_wait_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_WAIT_FENCES, amdgpu_cs_wait_fences_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_METADATA, amdgpu_gem_metadata_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_VA, amdgpu_gem_va_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> +     DRM_IOCTL_DEF_DRV(AMDGPU_FREESYNC, amdgpu_display_freesync_ioctl, 
> DRM_MASTER)

freesync escaped from your internal tree, I dropped that when applying.
Plus I solved the conflict with drm_dev_alloc (it should be in drm-next
now sinc this morning, maybe good time to resync the internal tree to
avoid conflicts like this).

Otherwise looks a lot less work than I feared (after having wrangled
radeon to work), thanks for doing this.
-Daniel

> +};
> +
> +static const struct drm_driver amdgpu_kms_driver = {
>       .driver_features =
>           DRIVER_ATOMIC |
>           DRIVER_GEM |
> @@ -1539,6 +1563,7 @@ static struct drm_driver kms_driver = {
>       .lastclose = amdgpu_driver_lastclose_kms,
>       .irq_handler = amdgpu_irq_handler,
>       .ioctls = amdgpu_ioctls_kms,
> +     .num_ioctls = ARRAY_SIZE(amdgpu_ioctls_kms),
>       .gem_free_object_unlocked = amdgpu_gem_object_free,
>       .gem_open_object = amdgpu_gem_object_open,
>       .gem_close_object = amdgpu_gem_object_close,
> @@ -1597,7 +1622,6 @@ static int __init amdgpu_init(void)
>               goto error_fence;
>  
>       DRM_INFO("amdgpu kernel modesetting enabled.\n");
> -     kms_driver.num_ioctls = amdgpu_max_kms_ioctl;
>       amdgpu_register_atpx_handler();
>  
>       /* Ignore KFD init failures. Normal when CONFIG_HSA_AMD is not set. */
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index bf01744a38f8..4f72c096b3c8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -29,7 +29,6 @@
>  #include "amdgpu.h"
>  #include <drm/drm_debugfs.h>
>  #include <drm/amdgpu_drm.h>
> -#include "amdgpu_sched.h"
>  #include "amdgpu_uvd.h"
>  #include "amdgpu_vce.h"
>  #include "atom.h"
> @@ -484,7 +483,7 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
>   * etc. (all asics).
>   * Returns 0 on success, -EINVAL on failure.
>   */
> -static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct 
> drm_file *filp)
> +int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file 
> *filp)
>  {
>       struct amdgpu_device *adev = drm_to_adev(dev);
>       struct drm_amdgpu_info *info = data;
> @@ -1247,28 +1246,6 @@ void amdgpu_disable_vblank_kms(struct drm_crtc *crtc)
>       amdgpu_irq_put(adev, &adev->crtc_irq, idx);
>  }
>  
> -const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
> -     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_CREATE, amdgpu_gem_create_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_CTX, amdgpu_ctx_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_VM, amdgpu_vm_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_SCHED, amdgpu_sched_ioctl, DRM_MASTER),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_BO_LIST, amdgpu_bo_list_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_FENCE_TO_HANDLE, 
> amdgpu_cs_fence_to_handle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
> -     /* KMS */
> -     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_MMAP, amdgpu_gem_mmap_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_WAIT_IDLE, amdgpu_gem_wait_idle_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_CS, amdgpu_cs_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_INFO, amdgpu_info_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_WAIT_CS, amdgpu_cs_wait_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_WAIT_FENCES, amdgpu_cs_wait_fences_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_METADATA, amdgpu_gem_metadata_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_VA, amdgpu_gem_va_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl, 
> DRM_AUTH|DRM_RENDER_ALLOW),
> -     DRM_IOCTL_DEF_DRV(AMDGPU_FREESYNC, amdgpu_display_freesync_ioctl, 
> DRM_MASTER)
> -};
> -const int amdgpu_max_kms_ioctl = ARRAY_SIZE(amdgpu_ioctls_kms);
> -
>  /*
>   * Debugfs info
>   */
> -- 
> 2.29.2.154.g7f7ebe054a
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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