[AMD Official Use Only - Internal Distribution Only]
The series is
Reviewed-by: Jack Gui <jack....@amd.com>
-----Original Message-----
From: Zhou1, Tao <tao.zh...@amd.com>
Sent: Saturday, October 10, 2020 3:57 PM
To: Chen, Jiansong (Simon) <jiansong.c...@amd.com>; Gui, Jack
<jack....@amd.com>; Zhang, Hawking <hawking.zh...@amd.com>;
amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao <tao.zh...@amd.com>
Subject: [PATCH 2/2] drm/amdgpu: add DM block for dimgrey_cavefish
Add DM block support for dimgrey_cavefish.
Signed-off-by: Tao Zhou <tao.zh...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
drivers/gpu/drm/amd/amdgpu/nv.c | 4 ++++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 8de930108db4..a2f0ce854160 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3013,6 +3013,7 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type
asic_type) #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER:
+ case CHIP_DIMGREY_CAVEFISH:
#endif
return amdgpu_dc != 0;
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index e6bc7f09ec43..47bd79c9e6ea 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -637,6 +637,10 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+ else if (amdgpu_device_has_dc_support(adev))
+ amdgpu_device_ip_block_add(adev, &dm_ip_block);
+#endif
amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block);
amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block);
--
2.17.1
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