From: Chengming Gui <jack....@amd.com>

Add KFD support for dimgrey cavefish.

v2: rebase (Alex)

Signed-off-by: Chengming Gui <jack....@amd.com>
Reviewed-by: Tao Zhou <tao.zh...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
 drivers/gpu/drm/amd/amdkfd/kfd_crat.c         |  1 +
 drivers/gpu/drm/amd/amdkfd/kfd_device.c       | 20 +++++++++++++++++++
 .../drm/amd/amdkfd/kfd_device_queue_manager.c |  1 +
 drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c  |  1 +
 .../gpu/drm/amd/amdkfd/kfd_packet_manager.c   |  1 +
 drivers/gpu/drm/amd/amdkfd/kfd_topology.c     |  1 +
 6 files changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
index 0eeda7904c14..7a071b4f76a7 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
@@ -681,6 +681,7 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev,
        case CHIP_NAVI14:
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
+       case CHIP_DIMGREY_CAVEFISH:
                pcache_info = navi10_cache_info;
                num_of_cache_types = ARRAY_SIZE(navi10_cache_info);
                break;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index 81751da79feb..7a1ff80cfb01 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -517,6 +517,25 @@ static const struct kfd_device_info vangogh_device_info = {
        .num_sdma_queues_per_engine = 2,
 };
 
+static const struct kfd_device_info dimgrey_cavefish_device_info = {
+       .asic_family = CHIP_DIMGREY_CAVEFISH,
+       .asic_name = "dimgrey_cavefish",
+       .max_pasid_bits = 16,
+       .max_no_of_hqd  = 24,
+       .doorbell_size  = 8,
+       .ih_ring_entry_size = 8 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_v9,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .needs_iommu_device = false,
+       .supports_cwsr = true,
+       .needs_pci_atomics = false,
+       .num_sdma_engines = 2,
+       .num_xgmi_sdma_engines = 0,
+       .num_sdma_queues_per_engine = 8,
+};
+
+
 /* For each entry, [0] is regular and [1] is virtualisation device. */
 static const struct kfd_device_info *kfd_supported_devices[][2] = {
 #ifdef KFD_SUPPORT_IOMMU_V2
@@ -542,6 +561,7 @@ static const struct kfd_device_info 
*kfd_supported_devices[][2] = {
        [CHIP_SIENNA_CICHLID] = {&sienna_cichlid_device_info, 
&sienna_cichlid_device_info},
        [CHIP_NAVY_FLOUNDER] = {&navy_flounder_device_info, 
&navy_flounder_device_info},
        [CHIP_VANGOGH] = {&vangogh_device_info, NULL},
+       [CHIP_DIMGREY_CAVEFISH] = {&dimgrey_cavefish_device_info, 
&dimgrey_cavefish_device_info},
 };
 
 static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index 7971bbe696d0..c579615451ba 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -1926,6 +1926,7 @@ struct device_queue_manager 
*device_queue_manager_init(struct kfd_dev *dev)
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
        case CHIP_VANGOGH:
+       case CHIP_DIMGREY_CAVEFISH:
                device_queue_manager_init_v10_navi10(&dqm->asic_ops);
                break;
        default:
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
index 379457d1b250..98a5e1d719c8 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
@@ -418,6 +418,7 @@ int kfd_init_apertures(struct kfd_process *process)
                        case CHIP_SIENNA_CICHLID:
                        case CHIP_NAVY_FLOUNDER:
                        case CHIP_VANGOGH:
+                       case CHIP_DIMGREY_CAVEFISH:
                                kfd_init_apertures_v9(pdd, id);
                                break;
                        default:
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
index 9beb2eabd56e..5d541e0cc8ca 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
@@ -248,6 +248,7 @@ int pm_init(struct packet_manager *pm, struct 
device_queue_manager *dqm)
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
        case CHIP_VANGOGH:
+       case CHIP_DIMGREY_CAVEFISH:
                pm->pmf = &kfd_v9_pm_funcs;
                break;
        default:
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
index da6b493c520f..3f2aa055c32c 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
@@ -1376,6 +1376,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
        case CHIP_VANGOGH:
+       case CHIP_DIMGREY_CAVEFISH:
                dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<
                        HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
                        HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
-- 
2.25.4

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