From: Aric Cyr <aric....@amd.com>

[Why]
Test expects that we also read HPD_IRQ_VECTOR when checking for
symbol loss as well lane status.

[How]
Read bytes 0x200-0x205 instead of just 0x202-0x205

Signed-off-by: Aric Cyr <aric....@amd.com>
Reviewed-by: Jun Lei <jun....@amd.com>
Acked-by: Eryk Brol <eryk.b...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 0447492d30ca..2bfa4e35c2cf 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1138,23 +1138,22 @@ static enum link_training_result check_link_loss_status(
        const struct link_training_settings *link_training_setting)
 {
        enum link_training_result status = LINK_TRAINING_SUCCESS;
-       unsigned int lane01_status_address = DP_LANE0_1_STATUS;
        union lane_status lane_status;
-       uint8_t dpcd_buf[4] = {0};
+       uint8_t dpcd_buf[6] = {0};
        uint32_t lane;
 
        core_link_read_dpcd(
-               link,
-               lane01_status_address,
-               (uint8_t *)(dpcd_buf),
-               sizeof(dpcd_buf));
+                       link,
+                       DP_SINK_COUNT,
+                       (uint8_t *)(dpcd_buf),
+                       sizeof(dpcd_buf));
 
        /*parse lane status*/
        for (lane = 0; lane < link->cur_link_settings.lane_count; lane++) {
                /*
                 * check lanes status
                 */
-               lane_status.raw = get_nibble_at_index(&dpcd_buf[0], lane);
+               lane_status.raw = get_nibble_at_index(&dpcd_buf[2], lane);
 
                if (!lane_status.bits.CHANNEL_EQ_DONE_0 ||
                        !lane_status.bits.CR_DONE_0 ||
-- 
2.25.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to