From: Yongqiang Sun <yongqiang....@amd.com>
[Why]
dal side nv12 wa has a lot of side effects.
KMD side wa is used, so this should be remove.
[How]
Removed wa from dal side.
Signed-off-by: Yongqiang Sun <yongqiang....@amd.com>
Reviewed-by: Tony Cheng <tony.ch...@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
---
.../drm/amd/display/dc/core/dc_vm_helper.c | 3 -
drivers/gpu/drm/amd/display/dc/dc.h | 1 -
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 3 -
.../gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c | 121 +-----------------
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 1 -
drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 3 -
6 files changed, 2 insertions(+), 130 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_vm_helper.c
b/drivers/gpu/drm/amd/display/dc/core/dc_vm_helper.c
index 64cf24a9ab08..f2b39ec35c89 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_vm_helper.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_vm_helper.c
@@ -47,9 +47,6 @@ int dc_setup_system_context(struct dc *dc, struct
dc_phy_addr_space_config *pa_c
*/
memcpy(&dc->vm_pa_config, pa_config, sizeof(struct
dc_phy_addr_space_config));
dc->vm_pa_config.valid = true;
-
- if (pa_config->is_hvm_enabled == 0)
- dc->debug.nv12_iflip_vm_wa = false;
}
return num_vmids;
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 391691c70805..11ac4b7ab174 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -471,7 +471,6 @@ struct dc_debug_options {
bool cm_in_bypass;
int force_clock_mode;/*every mode change.*/
- bool nv12_iflip_vm_wa;
bool disable_dram_clock_change_vactive_support;
bool validate_dml_output;
bool enable_dmcub_surface_flip;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 258dcd33787e..26cac587c56b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1435,9 +1435,6 @@ static void dcn20_update_dchubp_dpp(
hubp->power_gated = false;
}
- if (hubp->funcs->apply_PLAT_54186_wa && viewport_changed)
- hubp->funcs->apply_PLAT_54186_wa(hubp, &plane_state->address);
-
if (pipe_ctx->update_flags.bits.enable ||
plane_state->update_flags.bits.addr_update)
hws->funcs.update_plane_addr(dc, pipe_ctx);
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c
b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c
index 960a0716dde5..f9045852728f 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c
@@ -225,116 +225,6 @@ void hubp21_set_viewport(
SEC_VIEWPORT_Y_START_C, viewport_c->y);
}
-static void hubp21_apply_PLAT_54186_wa(
- struct hubp *hubp,
- const struct dc_plane_address *address)
-{
- struct dcn21_hubp *hubp21 = TO_DCN21_HUBP(hubp);
- struct dc_debug_options *debug = &hubp->ctx->dc->debug;
- unsigned int chroma_bpe = 2;
- unsigned int luma_addr_high_part = 0;
- unsigned int row_height = 0;
- unsigned int chroma_pitch = 0;
- unsigned int viewport_c_height = 0;
- unsigned int viewport_c_width = 0;
- unsigned int patched_viewport_height = 0;
- unsigned int patched_viewport_width = 0;
- unsigned int rotation_angle = 0;
- unsigned int pix_format = 0;
- unsigned int h_mirror_en = 0;
- unsigned int tile_blk_size = 64 * 1024; /* 64KB for 64KB SW, 4KB for
4KB SW */
-
-
- if (!debug->nv12_iflip_vm_wa)
- return;
-
- REG_GET(DCHUBP_REQ_SIZE_CONFIG_C,
- PTE_ROW_HEIGHT_LINEAR_C, &row_height);
-
- REG_GET_2(DCSURF_PRI_VIEWPORT_DIMENSION_C,
- PRI_VIEWPORT_WIDTH_C, &viewport_c_width,
- PRI_VIEWPORT_HEIGHT_C, &viewport_c_height);
-
- REG_GET(DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C,
- PRIMARY_SURFACE_ADDRESS_HIGH_C, &luma_addr_high_part);
-
- REG_GET(DCSURF_SURFACE_PITCH_C,
- PITCH_C, &chroma_pitch);
-
- chroma_pitch += 1;
-
- REG_GET_3(DCSURF_SURFACE_CONFIG,
- SURFACE_PIXEL_FORMAT, &pix_format,
- ROTATION_ANGLE, &rotation_angle,
- H_MIRROR_EN, &h_mirror_en);
-
- /* reset persistent cached data */
- hubp21->PLAT_54186_wa_chroma_addr_offset = 0;
- /* apply wa only for NV12 surface with scatter gather enabled with
viewport > 512 along
- * the vertical direction*/
- if (address->type != PLN_ADDR_TYPE_VIDEO_PROGRESSIVE ||
- address->video_progressive.luma_addr.high_part == 0xf4)
- return;
-
- if ((rotation_angle == ROTATION_ANGLE_0 || rotation_angle ==
ROTATION_ANGLE_180)
- && viewport_c_height <= 512)
- return;
-
- if ((rotation_angle == ROTATION_ANGLE_90 || rotation_angle ==
ROTATION_ANGLE_270)
- && viewport_c_width <= 512)
- return;
-
- switch (rotation_angle) {
- case ROTATION_ANGLE_0: /* 0 degree rotation */
- row_height = 128;
- patched_viewport_height = (viewport_c_height / row_height + 1)
* row_height + 1;
- patched_viewport_width = viewport_c_width;
- hubp21->PLAT_54186_wa_chroma_addr_offset = 0;
- break;
- case ROTATION_ANGLE_180: /* 180 degree rotation */
- row_height = 128;
- patched_viewport_height = viewport_c_height + row_height;
- patched_viewport_width = viewport_c_width;
- hubp21->PLAT_54186_wa_chroma_addr_offset = 0 - chroma_pitch *
row_height * chroma_bpe;
- break;
- case ROTATION_ANGLE_90: /* 90 degree rotation */
- row_height = 256;
- if (h_mirror_en) {
- patched_viewport_height = viewport_c_height;
- patched_viewport_width = viewport_c_width + row_height;
- hubp21->PLAT_54186_wa_chroma_addr_offset = 0;
- } else {
- patched_viewport_height = viewport_c_height;
- patched_viewport_width = viewport_c_width + row_height;
- hubp21->PLAT_54186_wa_chroma_addr_offset = 0 -
tile_blk_size;
- }
- break;
- case ROTATION_ANGLE_270: /* 270 degree rotation */
- row_height = 256;
- if (h_mirror_en) {
- patched_viewport_height = viewport_c_height;
- patched_viewport_width = viewport_c_width + row_height;
- hubp21->PLAT_54186_wa_chroma_addr_offset = 0 -
tile_blk_size;
- } else {
- patched_viewport_height = viewport_c_height;
- patched_viewport_width = viewport_c_width + row_height;
- hubp21->PLAT_54186_wa_chroma_addr_offset = 0;
- }
- break;
- default:
- ASSERT(0);
- break;
- }
-
- /* catch cases where viewport keep growing */
- ASSERT(patched_viewport_height && patched_viewport_height < 5000);
- ASSERT(patched_viewport_width && patched_viewport_width < 5000);
-
- REG_UPDATE_2(DCSURF_PRI_VIEWPORT_DIMENSION_C,
- PRI_VIEWPORT_WIDTH_C, patched_viewport_width,
- PRI_VIEWPORT_HEIGHT_C, patched_viewport_height);
-}
-
void hubp21_set_vm_system_aperture_settings(struct hubp *hubp,
struct vm_system_aperture_param *apt)
{
@@ -812,8 +702,6 @@ bool hubp21_program_surface_flip_and_addr(
const struct dc_plane_address *address,
bool flip_immediate)
{
- struct dc_debug_options *debug = &hubp->ctx->dc->debug;
- struct dcn21_hubp *hubp21 = TO_DCN21_HUBP(hubp);
struct surface_flip_registers flip_regs = { 0 };
flip_regs.vmid = address->vmid;
@@ -859,12 +747,8 @@ bool hubp21_program_surface_flip_and_addr(
flip_regs.DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH =
address->video_progressive.luma_addr.high_part;
- if (debug->nv12_iflip_vm_wa) {
- flip_regs.DCSURF_PRIMARY_SURFACE_ADDRESS_C =
-
address->video_progressive.chroma_addr.low_part +
hubp21->PLAT_54186_wa_chroma_addr_offset;
- } else
- flip_regs.DCSURF_PRIMARY_SURFACE_ADDRESS_C =
-
address->video_progressive.chroma_addr.low_part;
+ flip_regs.DCSURF_PRIMARY_SURFACE_ADDRESS_C =
+ address->video_progressive.chroma_addr.low_part;
flip_regs.DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C =
address->video_progressive.chroma_addr.high_part;
@@ -942,7 +826,6 @@ static struct hubp_funcs dcn21_hubp_funcs = {
.set_blank = hubp1_set_blank,
.dcc_control = hubp1_dcc_control,
.mem_program_viewport = hubp21_set_viewport,
- .apply_PLAT_54186_wa = hubp21_apply_PLAT_54186_wa,
.set_cursor_attributes = hubp2_cursor_set_attributes,
.set_cursor_position = hubp1_cursor_set_position,
.hubp_clk_cntl = hubp1_clk_cntl,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
index f00a56835084..00436654c584 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
@@ -878,7 +878,6 @@ static const struct dc_debug_options debug_defaults_drv = {
.scl_reset_length10 = true,
.sanity_checks = true,
.disable_48mhz_pwrdwn = false,
- .nv12_iflip_vm_wa = true,
.usbc_combo_phy_reset_wa = true
};
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
index 2cb8466e657b..efce08e4c0ca 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
@@ -104,9 +104,6 @@ struct hubp_funcs {
const struct rect *viewport,
const struct rect *viewport_c);
- void (*apply_PLAT_54186_wa)(struct hubp *hubp,
- const struct dc_plane_address *address);
-
bool (*hubp_program_surface_flip_and_addr)(
struct hubp *hubp,
const struct dc_plane_address *address,
--
2.26.2
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