Am 16.03.20 um 11:08 schrieb Yintian Tao:
Originally, only the PTE valid is taken in consider.
The PRT case is missied when bo update which raise problem.
We need add condition for PRT case.

v2: add PRT condition for amdgpu_vm_bo_update_mapping, too

Good point, yes. Feel free to commit it like this, but we might want to add a define for (AMDGPU_PTE_VALID | AMDGPU_PTE_PRT) at some time to make the code easier to read.

Going to take care of this as a follow up cleanup as soon as the patch lands on amd-staging-drm-next.

Regards,
Christian.

v3: fix one typo error

Signed-off-by: Yintian Tao <yt...@amd.com>
Reviewed-by: Christian König <christian.koe...@amd.com>
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 73398831196f..6157f6a9dcc8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1446,7 +1446,7 @@ static int amdgpu_vm_update_ptes(struct 
amdgpu_vm_update_params *params,
                uint64_t incr, entry_end, pe_start;
                struct amdgpu_bo *pt;
- if (flags & AMDGPU_PTE_VALID) {
+               if (flags & (AMDGPU_PTE_VALID | AMDGPU_PTE_PRT)) {
                        /* make sure that the page tables covering the
                         * address range are actually allocated
                         */
@@ -1603,7 +1603,7 @@ static int amdgpu_vm_bo_update_mapping(struct 
amdgpu_device *adev,
                goto error_unlock;
        }
- if (flags & AMDGPU_PTE_VALID) {
+       if (flags & (AMDGPU_PTE_VALID | AMDGPU_PTE_PRT)) {
                struct amdgpu_bo *root = vm->root.base.bo;
if (!dma_fence_is_signaled(vm->last_direct))
@@ -1718,7 +1718,7 @@ static int amdgpu_vm_bo_split_mapping(struct 
amdgpu_device *adev,
                                        AMDGPU_GPU_PAGES_IN_CPU_PAGE;
                        }
- } else if (flags & AMDGPU_PTE_VALID) {
+               } else if (flags & (AMDGPU_PTE_VALID | AMDGPU_PTE_PRT)) {
                        addr += bo_adev->vm_manager.vram_base_offset;
                        addr += pfn << PAGE_SHIFT;
                }

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