Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
________________________________
From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> on behalf of Yuan,
Xiaojie <xiaojie.y...@amd.com>
Sent: Wednesday, October 9, 2019 1:09 PM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Xiao, Jack <jack.x...@amd.com>; Yuan, Xiaojie <xiaojie.y...@amd.com>;
Zhang, Hawking <hawking.zh...@amd.com>
Subject: [PATCH] drm/amdgpu/sdma5: fix mask value of POLL_REGMEM packet for
pipe sync
sdma will hang once sequence number to be polled reaches 0x1000_0000
Signed-off-by: Xiaojie Yuan <xiaojie.y...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
index ad5c3566337c..3460c00f3eaa 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
@@ -1126,7 +1126,7 @@ static void sdma_v5_0_ring_emit_pipeline_sync(struct
amdgpu_ring *ring)
amdgpu_ring_write(ring, addr & 0xfffffffc);
amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);
amdgpu_ring_write(ring, seq); /* reference */
- amdgpu_ring_write(ring, 0xfffffff); /* mask */
+ amdgpu_ring_write(ring, 0xffffffff); /* mask */
amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |
SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry
count, poll interval */
}
--
2.20.1
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