Signed-off-by: xinhui pan <xinhui....@amd.com>
Reviewed-by: Feifei Xu <feifei...@amd.com>
Reviewed-by: Hawking Zhang <hawking.zh...@amd.com>
Acked-by: Alex Deucher <alexander.deuc...@amd.com>
---
include/drm/amdgpu_drm.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index be84e43c..ecd5fb21 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -726,6 +726,22 @@ struct drm_amdgpu_cs_chunk_data {
/* Number of VRAM page faults on CPU access. */
#define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E
#define AMDGPU_INFO_VRAM_LOST_COUNTER 0x1F
+/* query ras mask of enabled features*/
+#define AMDGPU_INFO_RAS_ENABLED_FEATURES 0x20
+ #define AMDGPU_INFO_RAS_ENABLED_UMC (1 << 0)
+ #define AMDGPU_INFO_RAS_ENABLED_SDMA (1 << 1)
+ #define AMDGPU_INFO_RAS_ENABLED_GFX (1 << 2)
+ #define AMDGPU_INFO_RAS_ENABLED_MMHUB (1 << 3)
+ #define AMDGPU_INFO_RAS_ENABLED_ATHUB (1 << 4)
+ #define AMDGPU_INFO_RAS_ENABLED_PCIE_BIF (1 << 5)
+ #define AMDGPU_INFO_RAS_ENABLED_HDP (1 << 6)
+ #define AMDGPU_INFO_RAS_ENABLED_XGMI_WAFL (1 << 7)
+ #define AMDGPU_INFO_RAS_ENABLED_DF (1 << 8)
+ #define AMDGPU_INFO_RAS_ENABLED_SMN (1 << 9)
+ #define AMDGPU_INFO_RAS_ENABLED_SEM (1 << 10)
+ #define AMDGPU_INFO_RAS_ENABLED_MP0 (1 << 11)
+ #define AMDGPU_INFO_RAS_ENABLED_MP1 (1 << 12)
+ #define AMDGPU_INFO_RAS_ENABLED_FUSE (1 << 13)
#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
--
2.17.1
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