On Mon, Sep 10, 2018 at 02:13:09PM +0800, Emily Deng wrote:
> since we use PSP to program IH regs now
>
> Signed-off-by: Monk Liu <monk....@amd.com>
Reviewed-by: Huang Rui <ray.hu...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 93476b8..acfc63e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1957,6 +1957,7 @@ static int amdgpu_device_ip_reinit_early_sriov(struct
> amdgpu_device *adev)
> static enum amd_ip_block_type ip_order[] = {
> AMD_IP_BLOCK_TYPE_GMC,
> AMD_IP_BLOCK_TYPE_COMMON,
> + AMD_IP_BLOCK_TYPE_PSP,
> AMD_IP_BLOCK_TYPE_IH,
> };
>
> @@ -1987,7 +1988,6 @@ static int amdgpu_device_ip_reinit_late_sriov(struct
> amdgpu_device *adev)
>
> static enum amd_ip_block_type ip_order[] = {
> AMD_IP_BLOCK_TYPE_SMC,
> - AMD_IP_BLOCK_TYPE_PSP,
> AMD_IP_BLOCK_TYPE_DCE,
> AMD_IP_BLOCK_TYPE_GFX,
> AMD_IP_BLOCK_TYPE_SDMA,
BTW, PSP should be loaded before SMC, because SMC ucode needs to be loaded
by PSP.
Thanks,
Ray
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
