To avoid the tlb flush not interrupted by world switch, use kiq and one
command to do tlb invalidate.
SWDEV-161497
Signed-off-by: Emily Deng <emily.d...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 6999042..b66371d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -330,13 +330,25 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device
*adev,
{
/* Use register 17 for GART */
const unsigned eng = 17;
- unsigned i, j;
+ unsigned i, j, r;
spin_lock(&adev->gmc.invalidate_lock);
for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
struct amdgpu_vmhub *hub = &adev->vmhub[i];
u32 tmp = gmc_v9_0_get_invalidate_req(vmid);
+ struct amdgpu_ring *ring = &(adev->gfx.kiq.ring);
+
+ if (amdgpu_sriov_vf(adev) && amdgpu_sriov_runtime(adev)) {
+ r = amdgpu_ring_alloc(ring, 7);
+ if (r)
+ DRM_ERROR("amdgpu: tlb flush alloc kiq ring
fail.\n");
+ amdgpu_ring_emit_reg_write_reg_wait(ring,
hub->vm_inv_eng0_req + eng,
+ hub->vm_inv_eng0_ack + eng,
+ tmp, 1 << vmid);
+ amdgpu_ring_commit(ring);
+ continue;
+ }
WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, tmp);
--
2.7.4
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