Only delete the dead temp variables in Polaris.

Signed-off-by: Rex Zhu <rex....@amd.com>
---
 .../drm/amd/powerplay/smumgr/polaris10_smumgr.c    | 22 ++++++----------------
 1 file changed, 6 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 
b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
index a4ce199..1276f16 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
@@ -1204,7 +1204,6 @@ static int polaris10_populate_smc_acpi_level(struct 
pp_hwmgr *hwmgr,
                        (struct phm_ppt_v1_information *)(hwmgr->pptable);
        SMIO_Pattern vol_level;
        uint32_t mvdd;
-       uint16_t us_mvdd;
 
        table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC;
 
@@ -1255,16 +1254,11 @@ static int polaris10_populate_smc_acpi_level(struct 
pp_hwmgr *hwmgr,
                        "in Clock Dependency Table",
                        );
 
-       us_mvdd = 0;
-       if ((SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control) ||
-                       (data->mclk_dpm_key_disabled))
-               us_mvdd = data->vbios_boot_state.mvdd_bootup_value;
-       else {
-               if (!polaris10_populate_mvdd_value(hwmgr,
+       if (!((SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control) ||
+                       (data->mclk_dpm_key_disabled)))
+               polaris10_populate_mvdd_value(hwmgr,
                                data->dpm_table.mclk_table.dpm_levels[0].value,
-                               &vol_level))
-                       us_mvdd = vol_level.Voltage;
-       }
+                               &vol_level);
 
        if (0 == polaris10_populate_mvdd_value(hwmgr, 0, &vol_level))
                table->MemoryACPILevel.MinMvdd = 
PP_HOST_TO_SMC_UL(vol_level.Voltage);
@@ -1517,7 +1511,7 @@ static int 
polaris10_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr)
        uint32_t ro, efuse, volt_without_cks, volt_with_cks, value, max, min;
        struct polaris10_smumgr *smu_data = (struct polaris10_smumgr 
*)(hwmgr->smu_backend);
 
-       uint8_t i, stretch_amount, stretch_amount2, volt_offset = 0;
+       uint8_t i, stretch_amount, volt_offset = 0;
        struct phm_ppt_v1_information *table_info =
                        (struct phm_ppt_v1_information *)(hwmgr->pptable);
        struct phm_ppt_v1_clock_voltage_dependency_table *sclk_table =
@@ -1568,11 +1562,7 @@ static int 
polaris10_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr)
 
        smu_data->smc_state_table.LdoRefSel = 
(table_info->cac_dtp_table->ucCKS_LDO_REFSEL != 0) ? 
table_info->cac_dtp_table->ucCKS_LDO_REFSEL : 6;
        /* Populate CKS Lookup Table */
-       if (stretch_amount == 1 || stretch_amount == 2 || stretch_amount == 5)
-               stretch_amount2 = 0;
-       else if (stretch_amount == 3 || stretch_amount == 4)
-               stretch_amount2 = 1;
-       else {
+       if (stretch_amount == 0 || stretch_amount > 5) {
                phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
                                PHM_PlatformCaps_ClockStretcher);
                PP_ASSERT_WITH_CODE(false,
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to