From: Krunoslav Kovac <krunoslav.ko...@amd.com>
DCN allows cursor multiplier when blending FP16 surface.
Signed-off-by: Krunoslav Kovac <krunoslav.ko...@amd.com>
Reviewed-by: Aric Cyr <aric....@amd.com>
Reviewed-by: Anthony Koo <anthony....@amd.com>
Acked-by: Harry Wentland <harry.wentl...@amd.com>
---
drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 1 +
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 15 +++++++++++++++
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h | 12 ++++++++----
3 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
index f285d3754221..7117f9f95b27 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
@@ -490,6 +490,7 @@ struct dc_cursor_attributes {
uint32_t height;
enum dc_cursor_color_format color_format;
+ uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode
/* In case we support HW Cursor rotation in the future */
enum dc_rotation_angle rotation_angle;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
index 75442183b5d6..60e4fb8da9db 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
@@ -27,6 +27,7 @@
#include "reg_helper.h"
#include "basics/conversion.h"
#include "dcn10_hubp.h"
+#include "custom_float.h"
#define REG(reg)\
hubp1->hubp_regs->reg
@@ -1052,6 +1053,18 @@ void hubp1_cursor_set_attributes(
enum cursor_pitch hw_pitch = hubp1_get_cursor_pitch(attr->pitch);
enum cursor_lines_per_chunk lpc = hubp1_get_lines_per_chunk(
attr->width, attr->color_format);
+ struct fixed31_32 multiplier;
+ uint32_t hw_mult = 0x3c00; // 1.0 default multiplier
+ struct custom_float_format fmt;
+
+ fmt.exponenta_bits = 5;
+ fmt.mantissa_bits = 10;
+ fmt.sign = true;
+
+ if (attr->sdr_white_level > 80) {
+ multiplier = dc_fixpt_from_fraction(attr->sdr_white_level, 80);
+ convert_to_custom_float_format(multiplier, &fmt, &hw_mult);
+ }
hubp->curs_attr = *attr;
@@ -1074,6 +1087,8 @@ void hubp1_cursor_set_attributes(
CURSOR0_DST_Y_OFFSET, 0,
/* used to shift the cursor chunk request deadline */
CURSOR0_CHUNK_HDL_ADJUST, 3);
+
+ REG_UPDATE(CURSOR0_FP_SCALE_BIAS, CUR0_FP_SCALE, hw_mult);
}
void hubp1_cursor_set_position(
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
index 20f3c206fcc3..1abb369d9430 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
@@ -133,7 +133,8 @@
SRI(CURSOR_CONTROL, CURSOR, id), \
SRI(CURSOR_POSITION, CURSOR, id), \
SRI(CURSOR_HOT_SPOT, CURSOR, id), \
- SRI(CURSOR_DST_OFFSET, CURSOR, id)
+ SRI(CURSOR_DST_OFFSET, CURSOR, id), \
+ SRI(CURSOR0_FP_SCALE_BIAS, CNVC_CUR, id)
#define HUBP_COMMON_REG_VARIABLE_LIST \
uint32_t DCHUBP_CNTL; \
@@ -241,7 +242,8 @@
uint32_t CURSOR_POSITION; \
uint32_t CURSOR_HOT_SPOT; \
uint32_t CURSOR_DST_OFFSET; \
- uint32_t HUBP_CLK_CNTL
+ uint32_t HUBP_CLK_CNTL; \
+ uint32_t CURSOR0_FP_SCALE_BIAS
#define HUBP_SF(reg_name, field_name, post_fix)\
.field_name = reg_name ## __ ## field_name ## post_fix
@@ -426,7 +428,8 @@
HUBP_SF(CURSOR0_CURSOR_POSITION, CURSOR_Y_POSITION, mask_sh), \
HUBP_SF(CURSOR0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_X, mask_sh), \
HUBP_SF(CURSOR0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_Y, mask_sh), \
- HUBP_SF(CURSOR0_CURSOR_DST_OFFSET, CURSOR_DST_X_OFFSET, mask_sh)
+ HUBP_SF(CURSOR0_CURSOR_DST_OFFSET, CURSOR_DST_X_OFFSET, mask_sh), \
+ HUBP_SF(CNVC_CUR0_CURSOR0_FP_SCALE_BIAS, CUR0_FP_SCALE, mask_sh)
#define DCN_HUBP_REG_FIELD_LIST(type) \
type HUBP_BLANK_EN;\
@@ -619,7 +622,8 @@
type CURSOR_HOT_SPOT_X; \
type CURSOR_HOT_SPOT_Y; \
type CURSOR_DST_X_OFFSET; \
- type OUTPUT_FP
+ type OUTPUT_FP; \
+ type CUR0_FP_SCALE
struct dcn_mi_registers {
HUBP_COMMON_REG_VARIABLE_LIST;
--
2.17.1
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