[PATCH 1/5] drm/amd/pp: Export notify_smu_enable_pwe to display

[Rex Zhu]

From: Rex Zhu <rex....@amd.com>

Display can notify smu to enable pwe after gpu suspend.
It is used in case when display resumes from S3 and wants to start
audio driver by enabling pwe
Signed-off-by: Rex Zhu <rex....@amd.com>
---
 drivers/gpu/drm/amd/include/kgd_pp_interface.h |  7 ++++---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c  | 20 ++++++++++++++++++++
 2 files changed, 24 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h 
b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index 99ee3ed..6a41b81 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -241,6 +241,9 @@ struct amd_pm_funcs {
        int (*set_clockgating_by_smu)(void *handle, uint32_t msg_id);
        int (*set_power_limit)(void *handle, uint32_t n);
        int (*get_power_limit)(void *handle, uint32_t *limit, bool 
default_limit);
+       int (*get_power_profile_mode)(void *handle, char *buf);
+       int (*set_power_profile_mode)(void *handle, long *input, uint32_t size);
+       int (*odn_edit_dpm_table)(void *handle, uint32_t type, long *input, 
uint32_t size);
 /* export to DC */
        u32 (*get_sclk)(void *handle, bool low);
        u32 (*get_mclk)(void *handle, bool low);
@@ -265,9 +268,7 @@ struct amd_pm_funcs {
                                struct pp_display_clock_request *clock);
        int (*get_display_mode_validation_clocks)(void *handle,
                struct amd_pp_simple_clock_info *clocks);
-       int (*get_power_profile_mode)(void *handle, char *buf);
-       int (*set_power_profile_mode)(void *handle, long *input, uint32_t size);
-       int (*odn_edit_dpm_table)(void *handle, uint32_t type, long *input, 
uint32_t size);
+       int (*notify_smu_enable_pwe)(void *handle);
 };
 
 #endif
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c 
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index b72cc64..145e5c4 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -1201,6 +1201,25 @@ static int pp_set_powergating_by_smu(void *handle,
        return ret;
 }
 
+static int pp_notify_smu_enable_pwe(void *handle)
+{
+       struct pp_hwmgr *hwmgr = handle;
+
+       if (!hwmgr || !hwmgr->pm_en)
+               return -EINVAL;;
+
+       if (hwmgr->hwmgr_func->smus_notify_pwe == NULL) {
+               pr_info("%s was not implemented.\n", __func__);
+               return -EINVAL;;
+       }
+
+       mutex_lock(&hwmgr->smu_lock);
+       hwmgr->hwmgr_func->smus_notify_pwe(hwmgr);
+       mutex_unlock(&hwmgr->smu_lock);
+
+       return 0;
+}
+
 static const struct amd_pm_funcs pp_dpm_funcs = {
        .load_firmware = pp_dpm_load_fw,
        .wait_for_fw_loading_complete = pp_dpm_fw_loading_complete,
@@ -1244,4 +1263,5 @@ static int pp_set_powergating_by_smu(void *handle,
        .set_watermarks_for_clocks_ranges = pp_set_watermarks_for_clocks_ranges,
        .display_clock_voltage_request = pp_display_clock_voltage_request,
        .get_display_mode_validation_clocks = 
pp_get_display_mode_validation_clocks,
+       .notify_smu_enable_pwe = pp_notify_smu_enable_pwe,
 };
-- 
1.9.1

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