From: Boyuan Zhang <boyuan.zh...@amd.com>

Define extra dword for jpeg ring. Jpeg ring will allocate extra dword to store
the patch commands for fixing the known issue.

Signed-off-by: Boyuan Zhang <boyuan.zh...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 +
 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c    | 3 +++
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index c6850b6..19e45a3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -304,7 +304,7 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct 
amdgpu_ring *ring,
                0xffffffffffffffff : ring->buf_mask;
        /* Allocate ring buffer */
        if (ring->ring_obj == NULL) {
-               r = amdgpu_bo_create_kernel(adev, ring->ring_size, PAGE_SIZE,
+               r = amdgpu_bo_create_kernel(adev, ring->ring_size + 
ring->funcs->extra_dw, PAGE_SIZE,
                                            AMDGPU_GEM_DOMAIN_GTT,
                                            &ring->ring_obj,
                                            &ring->gpu_addr,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index a3908ef..a293f4e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -113,6 +113,7 @@ struct amdgpu_ring_funcs {
        u32                     nop;
        bool                    support_64bit_ptrs;
        unsigned                vmhub;
+       unsigned                extra_dw;
 
        /* ring read/write ptr handling */
        u64 (*get_rptr)(struct amdgpu_ring *ring);
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index 8ece1d9..5ac5fd4 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -1626,6 +1626,7 @@ static const struct amdgpu_ring_funcs 
vcn_v1_0_dec_ring_vm_funcs = {
        .align_mask = 0xf,
        .support_64bit_ptrs = false,
        .vmhub = AMDGPU_MMHUB,
+       .extra_dw = 0,
        .get_rptr = vcn_v1_0_dec_ring_get_rptr,
        .get_wptr = vcn_v1_0_dec_ring_get_wptr,
        .set_wptr = vcn_v1_0_dec_ring_set_wptr,
@@ -1659,6 +1660,7 @@ static const struct amdgpu_ring_funcs 
vcn_v1_0_enc_ring_vm_funcs = {
        .nop = VCN_ENC_CMD_NO_OP,
        .support_64bit_ptrs = false,
        .vmhub = AMDGPU_MMHUB,
+       .extra_dw = 0,
        .get_rptr = vcn_v1_0_enc_ring_get_rptr,
        .get_wptr = vcn_v1_0_enc_ring_get_wptr,
        .set_wptr = vcn_v1_0_enc_ring_set_wptr,
@@ -1690,6 +1692,7 @@ static const struct amdgpu_ring_funcs 
vcn_v1_0_jpeg_ring_vm_funcs = {
        .nop = PACKET0(0x81ff, 0),
        .support_64bit_ptrs = false,
        .vmhub = AMDGPU_MMHUB,
+       .extra_dw = 64,
        .get_rptr = vcn_v1_0_jpeg_ring_get_rptr,
        .get_wptr = vcn_v1_0_jpeg_ring_get_wptr,
        .set_wptr = vcn_v1_0_jpeg_ring_set_wptr,
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to