This way we can see the PASID in VM faults.

Signed-off-by: Christian König <christian.koe...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 4d1f9404d17e..70c517b5d012 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -6347,6 +6347,14 @@ static void gfx_v8_0_ring_emit_vm_flush(struct 
amdgpu_ring *ring,
        amdgpu_ring_write(ring, 0);
        amdgpu_ring_write(ring, pd_addr >> 12);
 
+       amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
+       amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |
+                                WRITE_DATA_DST_SEL(0)) |
+                                WR_CONFIRM);
+       amdgpu_ring_write(ring, mmIH_VMID_0_LUT + vmid);
+       amdgpu_ring_write(ring, 0);
+       amdgpu_ring_write(ring, pasid);
+
        /* bits 0-15 are the VM contexts0-15 */
        /* invalidate the cache */
        amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
@@ -6872,7 +6880,7 @@ static const struct amdgpu_ring_funcs 
gfx_v8_0_ring_funcs_gfx = {
        .emit_frame_size = /* maximum 215dw if count 16 IBs in */
                5 +  /* COND_EXEC */
                7 +  /* PIPELINE_SYNC */
-               19 + /* VM_FLUSH */
+               24 + /* VM_FLUSH */
                8 +  /* FENCE for VM_FLUSH */
                20 + /* GDS switch */
                4 + /* double SWITCH_BUFFER,
@@ -6918,7 +6926,7 @@ static const struct amdgpu_ring_funcs 
gfx_v8_0_ring_funcs_compute = {
                7 + /* gfx_v8_0_ring_emit_hdp_flush */
                5 + /* gfx_v8_0_ring_emit_hdp_invalidate */
                7 + /* gfx_v8_0_ring_emit_pipeline_sync */
-               17 + /* gfx_v8_0_ring_emit_vm_flush */
+               22 + /* gfx_v8_0_ring_emit_vm_flush */
                7 + 7 + 7, /* gfx_v8_0_ring_emit_fence_compute x3 for user 
fence, vm fence */
        .emit_ib_size = 4, /* gfx_v8_0_ring_emit_ib_compute */
        .emit_ib = gfx_v8_0_ring_emit_ib_compute,
@@ -6948,7 +6956,7 @@ static const struct amdgpu_ring_funcs 
gfx_v8_0_ring_funcs_kiq = {
                7 + /* gfx_v8_0_ring_emit_hdp_flush */
                5 + /* gfx_v8_0_ring_emit_hdp_invalidate */
                7 + /* gfx_v8_0_ring_emit_pipeline_sync */
-               17 + /* gfx_v8_0_ring_emit_vm_flush */
+               22 + /* gfx_v8_0_ring_emit_vm_flush */
                7 + 7 + 7, /* gfx_v8_0_ring_emit_fence_kiq x3 for user fence, 
vm fence */
        .emit_ib_size = 4, /* gfx_v8_0_ring_emit_ib_compute */
        .emit_ib = gfx_v8_0_ring_emit_ib_compute,
-- 
2.14.1

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