[PATCH 1/9] drm/amd/pm/ci: Use highest MCLK on CI when MCLK DPM is disabled

[Timur Kristóf]

When MCLK DPM is disabled for any reason, populate the MCLK
table with the highest MCLK DPM level, so that the ASIC can
use the highest possible memory clock to get good performance
even when MCLK DPM is disabled.

Fixes: 9f4b35411cfe ("drm/amd/powerplay: add CI asics support to smumgr (v3)")
Signed-off-by: Timur Kristóf <timur.kris...@gmail.com>
---
 drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c 
b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
index ad1fd3150d03e..858f118130452 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
@@ -1322,6 +1322,14 @@ static int ci_populate_all_memory_levels(struct pp_hwmgr 
*hwmgr)
                        return result;
        }
 
+       if (data->mclk_dpm_key_disabled && dpm_table->mclk_table.count) {
+               /* Populate the table with the highest MCLK level when MCLK DPM 
is disabled */
+               for (i = 0; i < dpm_table->mclk_table.count - 1; i++) {
+                       levels[i] = levels[dpm_table->mclk_table.count - 1];
+                       levels[i].DisplayWatermark = 
PPSMC_DISPLAY_WATERMARK_HIGH;
+               }
+       }
+
        smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1;
 
        dev_id = adev->pdev->device;
-- 
2.53.0