This is a note to let you know that I've just added the patch titled
drm/amd/display: Add pixel_clock to amd_pp_display_configuration
to the 6.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-amd-display-add-pixel_clock-to-amd_pp_display_configuration.patch
and it can be found in the queue-6.1 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From [email protected] Sat Mar 21 06:45:19 2026
From: Rosen Penev <[email protected]>
Date: Fri, 20 Mar 2026 22:44:52 -0700
Subject: drm/amd/display: Add pixel_clock to amd_pp_display_configuration
To: [email protected]
Cc: "Alex Deucher" <[email protected]>, "Christian König"
<[email protected]>, "Pan, Xinhui" <[email protected]>, "David Airlie"
<[email protected]>, "Daniel Vetter" <[email protected]>, "Harry Wentland"
<[email protected]>, "Leo Li" <[email protected]>, "Rodrigo Siqueira"
<[email protected]>, "Evan Quan" <[email protected]>, "Mario
Limonciello" <[email protected]>, "Sasha Levin" <[email protected]>,
"Rosen Penev" <[email protected]>, "Lijo Lazar" <[email protected]>, "Ma Jun"
<[email protected]>, "Greg Kroah-Hartman" <[email protected]>,
"Srinivasan Shanmugam" <[email protected]>, "Mario Limonciello
(AMD)" <[email protected]>, "Zhigang Luo" <[email protected]>, "Bert
Karwatzki" <[email protected]>, "Ray Wu" <[email protected]>, "Wayne Lin"
<[email protected]>, "Roman Li" <[email protected]>, "Hersen Wu"
<[email protected]>, "Timur Kristóf" <[email protected]>, "Alex Hung"
<[email protected]>, decce6 <[email protected]>, "Went
ao Liang" <[email protected]>, [email protected] (open list:RADEON
and AMDGPU DRM DRIVERS), [email protected] (open list:DRM
DRIVERS), [email protected] (open list)
Message-ID: <[email protected]>
From: Timur Kristóf <[email protected]>
[ Upstream commit b515dcb0dc4e85d8254f5459cfb32fce88dacbfb ]
This commit adds the pixel_clock field to the display config
struct so that power management (DPM) can use it.
We currently don't have a proper bandwidth calculation on old
GPUs with DCE 6-10 because dce_calcs only supports DCE 11+.
So the power management (DPM) on these GPUs may need to make
ad-hoc decisions for display based on the pixel clock.
Also rename sym_clock to pixel_clock in dm_pp_single_disp_config
to avoid confusion with other code where the sym_clock refers to
the DisplayPort symbol clock.
Signed-off-by: Timur Kristóf <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Signed-off-by: Rosen Penev <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 1 +
drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c | 2 +-
drivers/gpu/drm/amd/display/dc/dm_services_types.h | 2 +-
drivers/gpu/drm/amd/include/dm_pp_interface.h | 1 +
4 files changed, 4 insertions(+), 2 deletions(-)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -97,6 +97,7 @@ bool dm_pp_apply_display_requirements(
const struct dm_pp_single_disp_config *dc_cfg =
&pp_display_cfg->disp_configs[i];
adev->pm.pm_display_cfg.displays[i].controller_id =
dc_cfg->pipe_idx + 1;
+ adev->pm.pm_display_cfg.displays[i].pixel_clock =
dc_cfg->pixel_clock;
}
amdgpu_dpm_display_configuration_change(adev,
&adev->pm.pm_display_cfg);
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c
@@ -164,7 +164,7 @@ void dce110_fill_display_configs(
stream->link->cur_link_settings.link_rate;
cfg->link_settings.link_spread =
stream->link->cur_link_settings.link_spread;
- cfg->sym_clock = stream->phy_pix_clk;
+ cfg->pixel_clock = stream->phy_pix_clk;
/* Round v_refresh*/
cfg->v_refresh = stream->timing.pix_clk_100hz * 100;
cfg->v_refresh /= stream->timing.h_total;
--- a/drivers/gpu/drm/amd/display/dc/dm_services_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_services_types.h
@@ -127,7 +127,7 @@ struct dm_pp_single_disp_config {
uint32_t src_height;
uint32_t src_width;
uint32_t v_refresh;
- uint32_t sym_clock; /* HDMI only */
+ uint32_t pixel_clock; /* Pixel clock in KHz (for HDMI only: normalized)
*/
struct dc_link_settings link_settings; /* DP only */
};
--- a/drivers/gpu/drm/amd/include/dm_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/dm_pp_interface.h
@@ -66,6 +66,7 @@ struct single_display_configuration
uint32_t view_resolution_cy;
enum amd_pp_display_config_type displayconfigtype;
uint32_t vertical_refresh; /* for active display */
+ uint32_t pixel_clock; /* Pixel clock in KHz (for HDMI only: normalized)
*/
};
#define MAX_NUM_DISPLAY 32
Patches currently in stable-queue which might be from [email protected] are
queue-6.1/drm-amdgpu-clarify-dc-checks.patch
queue-6.1/drm-amd-pm-use-pm_display_cfg-in-legacy-dpm-v2.patch
queue-6.1/drm-amdgpu-use-proper-dc-check-in-amdgpu_display_supported_domains.patch
queue-6.1/drm-amd-display-add-pixel_clock-to-amd_pp_display_configuration.patch
