Add a minimal producer for the render-node eventfd mechanism by signaling
a fixed event_id on GFX11 MES/userq EOP interrupts.

The IRQ path resolves:
  doorbell_offset -> fence_drv -> fence_drv->eventfd_mgr -> signal(event_id)

This avoids referencing amdgpu_fpriv from the fence driver, which can
outlive fpriv.

Cc: Harish Kasiviswanathan <[email protected]>
Cc: Felix Kuehling <[email protected]>
Cc: Alex Deucher <[email protected]>
Cc: Christian König <[email protected]>
Signed-off-by: Srinivasan Shanmugam <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index b1a1b8a10a08..e84d137dfef9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -26,6 +26,7 @@
 #include <linux/module.h>
 #include <linux/pci.h>
 #include "amdgpu.h"
+#include "amdgpu_eventfd.h"
 #include "amdgpu_gfx.h"
 #include "amdgpu_psp.h"
 #include "amdgpu_smu.h"
@@ -54,6 +55,8 @@
 #define GFX11_NUM_GFX_RINGS            1
 #define GFX11_MEC_HPD_SIZE     2048
 
+#define AMDGPU_EVENT_ID_USERQ_EOP 1
+
 #define RLCG_UCODE_LOADING_START_ADDRESS       0x00002000L
 #define RLC_PG_DELAY_3_DEFAULT_GC_11_0_1       0x1388
 
@@ -6489,6 +6492,7 @@ static int gfx_v11_0_eop_irq(struct amdgpu_device *adev,
 
        if (adev->enable_mes && doorbell_offset) {
                struct amdgpu_userq_fence_driver *fence_drv = NULL;
+               struct amdgpu_eventfd_mgr *mgr = NULL;
                struct xarray *xa = &adev->userq_xa;
                unsigned long flags;
 
@@ -6496,7 +6500,17 @@ static int gfx_v11_0_eop_irq(struct amdgpu_device *adev,
                fence_drv = xa_load(xa, doorbell_offset);
                if (fence_drv)
                        amdgpu_userq_fence_driver_process(fence_drv);
+
+               /* fence_drv is stable while xa is locked */
+               mgr = fence_drv ? fence_drv->eventfd_mgr : NULL;
                xa_unlock_irqrestore(xa, flags);
+
+               /*
+                * Notify render-node subscribers for this queue.
+                * IRQ-safe: amdgpu_eventfd_signal() uses xa_lock_irqsave().
+                */
+               if (mgr)
+                       amdgpu_eventfd_signal(mgr, AMDGPU_EVENT_ID_USERQ_EOP, 
1);
        } else {
                me_id = (entry->ring_id & 0x0c) >> 2;
                pipe_id = (entry->ring_id & 0x03) >> 0;
-- 
2.34.1

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