Hi Alex, Thank you for the feedback and for taking the time to review this issue.
I'll add debug code to capture the full stack trace when the TLB flush failures occur. I'll test this on my AMD Cezanne system over the next few days when I have more time available, and will send you the complete call chain information. Regarding the hibernation limitations you mentioned - I understand the challenges with secure boot compatibility and VRAM eviction. In my case, I'm not using secure boot, and my system has sufficient RAM and swap space to handle the VRAM backup, so those particular issues shouldn't affect my setup. I'll follow up with the stack traces and additional debugging information in the next few days. Thanks again, Ionut
