[Public]

Hi all,

This week this patchset was tested on 4 systems, two dGPU and two APU based, 
and tested across multiple display and connection types.

APU
        * Single Display eDP -> 1080p 60hz, 1920x1200 165hz, 3840x2400 60hz
        * Single Display DP (SST DSC) -> 4k144hz, 4k240hz
        * Multi display -> eDP + DP/HDMI/USB-C -> 1080p 60hz eDP + 4k 144hz, 4k 
240hz (Includes USB-C to DP/HDMI adapters)
        * Thunderbolt -> LG Ultrafine 5k
        * MST DSC -> Cable Matters 101075 (DP to 3x DP) with 3x 4k60hz 
displays, HP Hook G2 with 2x 4k60hz displays
        * USB 4 -> HP Hook G4, Lenovo Thunderbolt Dock, both with 2x 4k60hz DP 
and 1x 4k60hz HDMI displays
        * SST PCON -> Club3D CAC-1085 + 1x 4k 144hz, FRL3, at a max resolution 
supported by the dongle of 4k 120hz YUV420 12bpc.
        * MST PCON -> 1x 4k 144hz, FRL3, at a max resolution supported by the 
adapter of 4k 120hz RGB 8bpc.

DGPU
        * Single Display DP (SST DSC) -> 4k144hz, 4k240hz
        * Multiple Display DP -> 4k240hz + 4k144hz
        * MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60hz displays)
        * MST DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60hz 
displays)

The testing is a mix of automated and manual tests. Manual testing includes 
(but is not limited to)
        * Changing display configurations and settings
        * Video/Audio playback
        * Benchmark testing
        * Suspend/Resume testing
        * Feature testing (Freesync, HDCP, etc.)

Automated testing includes (but is not limited to)
        * Script testing (scripts to automate some of the manual checks)
        * IGT testing

The testing is mainly tested on the following displays, but occasionally there 
are tests with other displays
        * Samsung G8 Neo 4k240hz
        * Samsung QN55QN95B 4k 120hz
        * Acer XV322QKKV 4k144hz
        * HP U27 4k Wireless 4k60hz
        * LG 27UD58B 4k60hz
        * LG 32UN650WA 4k60hz
        * LG Ultrafine 5k 5k60hz
        * AU Optronics B140HAN01.1 1080p 60hz eDP
        * AU Optronics B160UAN01.J 1920x1200 165hz eDP
        * Samsung ATNA60YV02-0 3840x2400 60Hz OLED eDP


The patchset consists of the amd-staging-drm-next branch (Head commit - 
d51928df9271aa6c6c201448e358c25d5cfc5706 -> drm/amd/display: Promote DC to 
3.2.365) with new patches added on top of it.

Tested on Ubuntu 24.04.3, on Wayland and X11, using Gnome.

Tested-by: Dan Wheeler <[email protected]>



Thank you,

Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com

-----Original Message-----
From: Matthew Stewart <[email protected]>
Sent: Wednesday, January 14, 2026 3:22 PM
To: [email protected]
Cc: Wentland, Harry <[email protected]>; Li, Sun peng (Leo) 
<[email protected]>; Pillai, Aurabindo <[email protected]>; Li, Roman 
<[email protected]>; Lin, Wayne <[email protected]>; Chung, ChiaHsuan (Tom) 
<[email protected]>; Zuo, Jerry <[email protected]>; Wheeler, Daniel 
<[email protected]>; Wu, Ray <[email protected]>; LIPSKI, IVAN 
<[email protected]>; Hung, Alex <[email protected]>; Stewart, Matthew 
<[email protected]>
Subject: [PATCH 00/14] DC Patches Jan 14, 2026

This DC patchset brings improvements in multiple areas. In summary, we have:

- Update memory QoS measurement interface.
- Panel inst for monitors.
- Disable FEC when powering down encoders.
- Detect panel type from VSDB.
- Check NULL before accessing a variable.
- Initialize a default to phyd32clk.
- Revert "init dispclk from bootup clock".
- Add IPS residency info to debugfs.
- Ensure link output is disabled in backend reset for PLL_ON.
- Remove unused code.
- Add DMU crash recovery callback to DM.
- Remove coverity comments.

Cc: Dan Wheeler <[email protected]>

Alex Hung (3):
  drm/amd/display: Check NULL before accessing a variable
  drm/amd/display: Initialize a default to phyd32clk
  drm/amd/display: Remove coverity comments and fix spaces

Charlene Liu (1):
  drm/amd/display: Remove unused code

Mario Limonciello (AMD) (1):
  drm/amd/display: Detect panel type from VSDB

Nicholas Kazlauskas (2):
  drm/amd/display: Ensure link output is disabled in backend reset for
    PLL_ON
  drm/amd/display: Add DMU crash recovery callback to DM

Ovidiu Bunea (1):
  drm/amd/display: Disable FEC when powering down encoders

Peichen Huang (1):
  drm/amd/display: panel inst for monitors

Ray Wu (1):
  drm/amd/display: Add IPS residency info to debugfs

Taimur Hassan (1):
  drm/amd/display: Promote DC to 3.2.366

Wang, Sung-huai (2):
  drm/amd/display: Revert "init dispclk from bootup clock for DCN314"
  drm/amd/display: Revert "init dispclk from bootup clock for DCN315"

Wenjing Liu (1):
  drm/amd/display: update memory QoS measurement interface

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  15 ++  
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |  11 ++  
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |  71 +++++++++-
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   6 +
 .../dc/clk_mgr/dcn314/dcn314_clk_mgr.c        | 133 +-----------------
 .../dc/clk_mgr/dcn314/dcn314_clk_mgr.h        |   5 -
 .../dc/clk_mgr/dcn315/dcn315_clk_mgr.c        |  90 +-----------
 .../dc/clk_mgr/dcn315/dcn315_clk_mgr.h        |   1 -
 drivers/gpu/drm/amd/display/dc/core/dc.c      |  22 +--
 drivers/gpu/drm/amd/display/dc/dc.h           |   5 +-
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c  |  35 +++--
 drivers/gpu/drm/amd/display/dc/dc_types.h     |   7 +
 drivers/gpu/drm/amd/display/dc/dm_helpers.h   |   1 +
 .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  24 ++--
 .../amd/display/dc/hwss/dcn20/dcn20_hwseq.c   |   2 -
 .../amd/display/dc/hwss/dcn30/dcn30_init.c    |   1 -
 .../amd/display/dc/hwss/dcn301/dcn301_init.c  |   1 -
 .../amd/display/dc/hwss/dcn31/dcn31_hwseq.c   |  16 ++-
 .../amd/display/dc/hwss/dcn31/dcn31_init.c    |   1 -
 .../amd/display/dc/hwss/dcn314/dcn314_init.c  |   1 -
 .../amd/display/dc/hwss/dcn32/dcn32_init.c    |   1 -
 .../amd/display/dc/hwss/dcn35/dcn35_init.c    |   1 -
 .../amd/display/dc/hwss/dcn351/dcn351_init.c  |   1 -
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c |   2 +-
 .../amd/display/dc/hwss/dcn401/dcn401_init.c  |   1 -
 .../drm/amd/display/dc/hwss/hw_sequencer.h    |  38 +----
 .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 ++
 .../gpu/drm/amd/display/dc/inc/hw/dchubbub.h  |  28 ++--  
.../dc/link/protocols/link_dp_panel_replay.c  |  32 +++--
 .../link/protocols/link_edp_panel_control.c   |  15 +-
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   |  11 +-
 .../amd/display/modules/power/power_helpers.c |   5 +-
 32 files changed, 256 insertions(+), 335 deletions(-)

--
2.52.0

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