From: Mukul Joshi <[email protected]>

Send the Set_Shader_Debugger packet on the correct MES pipe when
partition mode is set to non-SPX mode.

Signed-off-by: Mukul Joshi <[email protected]>
Reviewed-by: Alex Sierra <[email protected]>
Reviewed-by: Michael Chen <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
---
 drivers/gpu/drm/amd/amdkfd/kfd_debug.c                 | 6 ++++--
 drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c | 3 ++-
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_debug.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
index f83e1238c1b3d..cd5a0b58c7d17 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
@@ -371,8 +371,10 @@ int kfd_dbg_set_mes_debug_mode(struct kfd_process_device 
*pdd, bool sq_trap_en)
                memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);
        }
 
-       return amdgpu_mes_set_shader_debugger(pdd->dev->adev, 
pdd->proc_ctx_gpu_addr, spi_dbg_cntl,
-                                               pdd->watch_points, flags, 
sq_trap_en, 0);
+       return amdgpu_mes_set_shader_debugger(pdd->dev->adev,
+                                       pdd->proc_ctx_gpu_addr, spi_dbg_cntl,
+                                       pdd->watch_points, flags, sq_trap_en,
+                                       ffs(pdd->dev->xcc_mask) - 1);
 }
 
 #define KFD_DEBUGGER_INVALID_WATCH_POINT_ID -1
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
index 5f8cda4733f9c..2a949c15e0180 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
@@ -94,7 +94,8 @@ void kfd_process_dequeue_from_device(struct 
kfd_process_device *pdd)
        if (dev->kfd->shared_resources.enable_mes && !!pdd->proc_ctx_gpu_addr &&
            down_read_trylock(&dev->adev->reset_domain->sem)) {
                amdgpu_mes_flush_shader_debugger(dev->adev,
-                                                pdd->proc_ctx_gpu_addr, 0);
+                                                pdd->proc_ctx_gpu_addr,
+                                                ffs(pdd->dev->xcc_mask) - 1);
                up_read(&dev->adev->reset_domain->sem);
        }
        pdd->already_dequeued = true;
-- 
2.52.0

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