On Mon, Sep 15, 2025 at 10:39 PM Mario Limonciello <[email protected]> wrote: > > If OD is not enabled then restoring cached clock settings doesn't make > sense and actually leads to errors in resume. > > Check if enabled before restoring settings. > > Fixes: 796ff8a7e01bd ("drm/amd: Restore cached manual clock settings during > resume") > Cc: [email protected] > Reported-by: Jérôme Lécuyer <[email protected]> > Closes: > https://lore.kernel.org/amd-gfx/[email protected]/T/#me6db8ddb192626360c462b7570ed7eba0c6c9733 > Suggested-by: Jérôme Lécuyer <[email protected]> > Signed-off-by: Mario Limonciello <[email protected]>
Acked-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > index bf2b38dd7e25..fb8086859857 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > @@ -2263,7 +2263,7 @@ static int smu_resume(struct amdgpu_ip_block *ip_block) > return ret; > } > > - if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) { > + if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL && > smu->od_enabled) { > ret = smu_od_edit_dpm_table(smu, PP_OD_COMMIT_DPM_TABLE, > NULL, 0); > if (ret) > return ret; > -- > 2.49.0 >
