Series is:
Acked-by: Alex Deucher <alexander.deuc...@amd.com>
On Thu, Jul 24, 2025 at 11:18 PM Mario Limonciello <supe...@kernel.org> wrote:
>
> From: Mario Limonciello <mario.limoncie...@amd.com>
>
> The power limit will be cached in smu->current_power_limit but
> if the ASIC goes into S3 this value won't be restored.
>
> Restore the value during SMU resume.
>
> Signed-off-by: Mario Limonciello <mario.limoncie...@amd.com>
> ---
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index d79a1d94661a5..7537964c3c998 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -2175,6 +2175,12 @@ static int smu_resume(struct amdgpu_ip_block *ip_block)
>
> adev->pm.dpm_enabled = true;
>
> + if (smu->current_power_limit) {
> + ret = smu_set_power_limit(smu, smu->current_power_limit);
> + if (ret && ret != -EOPNOTSUPP)
> + return ret;
> + }
> +
> dev_info(adev->dev, "SMU is resumed successfully!\n");
>
> return 0;
> --
> 2.43.0
>
