[AMD Official Use Only - AMD Internal Distribution Only]
Ping for the series.
> -----Original Message-----
> From: Zhou1, Tao <tao.zh...@amd.com>
> Sent: Wednesday, June 11, 2025 11:35 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhou1, Tao <tao.zh...@amd.com>
> Subject: [PATCH 1/4] drm/amdgpu: get sdma instance from irq id
>
> And the interface can be accessed globally.
>
> Signed-off-by: Tao Zhou <tao.zh...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h | 2 +
> drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 51 ++++++++++++++++--------
> 2 files changed, 36 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
> index e5f8951bbb6f..262321a0aa4f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
> @@ -54,6 +54,8 @@ struct amdgpu_sdma_funcs {
> int (*stop_kernel_queue)(struct amdgpu_ring *ring);
> int (*start_kernel_queue)(struct amdgpu_ring *ring);
> int (*soft_reset_kernel_queue)(struct amdgpu_device *adev, u32
> instance_id);
> + int (*sdma_irq_id_to_seq)(struct amdgpu_device *adev,
> + uint16_t client_id, uint16_t node_id);
> };
>
> struct amdgpu_sdma_instance {
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> index 9c169112a5e7..96ea9a0f952c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> @@ -156,6 +156,35 @@ static int sdma_v4_4_2_irq_id_to_seq(struct
> amdgpu_device *adev, unsigned client
> }
> }
>
> +static int sdma_v4_4_2_irq_id_to_seq_global(struct amdgpu_device *adev,
> + uint16_t client_id, uint16_t node_id) {
> + uint32_t instance, i;
> +
> + instance = sdma_v4_4_2_irq_id_to_seq(adev, client_id);
> +
> + /* Client id gives the SDMA instance in AID. To know the exact SDMA
> + * instance, interrupt entry gives the node id which corresponds to
> + * the AID instance. Match node id with the AID id associated with
> + * the SDMA instance.
> + */
> + for (i = instance; i < adev->sdma.num_instances;
> + i += adev->sdma.num_inst_per_aid) {
> + if (adev->sdma.instance[i].aid_id ==
> + node_id_to_phys_map[node_id])
> + break;
> + }
> +
> + if (i >= adev->sdma.num_instances) {
> + dev_WARN_ONCE(
> + adev->dev, 1,
> + "Couldn't find the right sdma instance in trap
> handler");
> + return -EINVAL;
> + }
> +
> + return i;
> +}
> +
> static void sdma_v4_4_2_inst_init_golden_registers(struct amdgpu_device
> *adev,
> uint32_t inst_mask)
> {
> @@ -1337,6 +1366,7 @@ static bool
> sdma_v4_4_2_fw_support_paging_queue(struct amdgpu_device *adev) static const
> struct amdgpu_sdma_funcs sdma_v4_4_2_sdma_funcs = {
> .stop_kernel_queue = &sdma_v4_4_2_stop_queue,
> .start_kernel_queue = &sdma_v4_4_2_restore_queue,
> + .sdma_irq_id_to_seq = &sdma_v4_4_2_irq_id_to_seq_global,
> };
>
> static int sdma_v4_4_2_early_init(struct amdgpu_ip_block *ip_block) @@
> -1764,27
> +1794,14 @@ static int sdma_v4_4_2_process_trap_irq(struct amdgpu_device
> *adev,
> struct amdgpu_irq_src *source,
> struct amdgpu_iv_entry *entry) {
> - uint32_t instance, i;
> + int i;
>
> DRM_DEBUG("IH: SDMA trap\n");
> - instance = sdma_v4_4_2_irq_id_to_seq(adev, entry->client_id);
>
> - /* Client id gives the SDMA instance in AID. To know the exact SDMA
> - * instance, interrupt entry gives the node id which corresponds to the
> AID
> instance.
> - * Match node id with the AID id associated with the SDMA instance. */
> - for (i = instance; i < adev->sdma.num_instances;
> - i += adev->sdma.num_inst_per_aid) {
> - if (adev->sdma.instance[i].aid_id ==
> - node_id_to_phys_map[entry->node_id])
> - break;
> - }
> -
> - if (i >= adev->sdma.num_instances) {
> - dev_WARN_ONCE(
> - adev->dev, 1,
> - "Couldn't find the right sdma instance in trap
> handler");
> + i = sdma_v4_4_2_irq_id_to_seq_global(adev, entry->client_id,
> + entry->node_id);
> + if (i < 0)
> return 0;
> - }
>
> switch (entry->ring_id) {
> case 0:
> --
> 2.34.1
