[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Asad Kamal <asad.ka...@amd.com>
Thanks & Regards
Asad
-----Original Message-----
From: Lazar, Lijo <lijo.la...@amd.com>
Sent: Friday, June 6, 2025 12:25 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking <hawking.zh...@amd.com>; Deucher, Alexander
<alexander.deuc...@amd.com>; Kamal, Asad <asad.ka...@amd.com>
Subject: [PATCH] drm/amd/pm: Show default gfx clock levels
For SMU v13.0.6 SOCs, always show default clock levels for gfx in pp_dpm_sclk.
Any custom min/max levels set by user will be available in pp_od_clk_voltage
Signed-off-by: Lijo Lazar <lijo.la...@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index 32bdffa360ee..36f210698bea 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -1416,8 +1416,9 @@ static int smu_v13_0_6_print_clk_levels(struct
smu_context *smu,
return ret;
}
- min_clk = pstate_table->gfxclk_pstate.curr.min;
- max_clk = pstate_table->gfxclk_pstate.curr.max;
+ single_dpm_table = &(dpm_context->dpm_tables.gfx_table);
+ min_clk = single_dpm_table->min;
+ max_clk = single_dpm_table->max;
if (now < SMU_13_0_6_DSCLK_THRESHOLD) {
size += sysfs_emit_at(buf, size, "S: %uMhz *\n",
--
2.25.1
