[PATCH 11/31] drm/amdgpu/gfx11: re-emit unprocessed state on ring reset

[Alex Deucher]

Re-emit the unprocessed state after resetting the queue.

Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 21 ++-------------------
 1 file changed, 2 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index afd6d59164bfa..4e0a6dcce91fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -6278,21 +6278,6 @@ static void 
gfx_v11_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring,
                               ref, mask, 0x20);
 }
 
-static void gfx_v11_0_ring_soft_recovery(struct amdgpu_ring *ring,
-                                        unsigned vmid)
-{
-       struct amdgpu_device *adev = ring->adev;
-       uint32_t value = 0;
-
-       value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03);
-       value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01);
-       value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1);
-       value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid);
-       amdgpu_gfx_rlc_enter_safe_mode(adev, 0);
-       WREG32_SOC15(GC, 0, regSQ_CMD, value);
-       amdgpu_gfx_rlc_exit_safe_mode(adev, 0);
-}
-
 static void
 gfx_v11_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,
                                      uint32_t me, uint32_t pipe,
@@ -6835,7 +6820,7 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring, 
unsigned int vmid)
                return r;
        }
 
-       return amdgpu_ring_test_ring(ring);
+       return amdgpu_ring_reemit_unprocessed_jobs(ring);
 }
 
 static int gfx_v11_0_reset_compute_pipe(struct amdgpu_ring *ring)
@@ -6995,7 +6980,7 @@ static int gfx_v11_0_reset_kcq(struct amdgpu_ring *ring, 
unsigned int vmid)
                return r;
        }
 
-       return amdgpu_ring_test_ring(ring);
+       return amdgpu_ring_reemit_unprocessed_jobs(ring);
 }
 
 static void gfx_v11_ip_print(struct amdgpu_ip_block *ip_block, struct 
drm_printer *p)
@@ -7231,7 +7216,6 @@ static const struct amdgpu_ring_funcs 
gfx_v11_0_ring_funcs_gfx = {
        .emit_wreg = gfx_v11_0_ring_emit_wreg,
        .emit_reg_wait = gfx_v11_0_ring_emit_reg_wait,
        .emit_reg_write_reg_wait = gfx_v11_0_ring_emit_reg_write_reg_wait,
-       .soft_recovery = gfx_v11_0_ring_soft_recovery,
        .emit_mem_sync = gfx_v11_0_emit_mem_sync,
        .reset = gfx_v11_0_reset_kgq,
        .emit_cleaner_shader = gfx_v11_0_ring_emit_cleaner_shader,
@@ -7273,7 +7257,6 @@ static const struct amdgpu_ring_funcs 
gfx_v11_0_ring_funcs_compute = {
        .emit_wreg = gfx_v11_0_ring_emit_wreg,
        .emit_reg_wait = gfx_v11_0_ring_emit_reg_wait,
        .emit_reg_write_reg_wait = gfx_v11_0_ring_emit_reg_write_reg_wait,
-       .soft_recovery = gfx_v11_0_ring_soft_recovery,
        .emit_mem_sync = gfx_v11_0_emit_mem_sync,
        .reset = gfx_v11_0_reset_kcq,
        .emit_cleaner_shader = gfx_v11_0_ring_emit_cleaner_shader,
-- 
2.49.0