On Mon, Apr 28, 2025 at 9:38 PM Zhang, Jesse(Jie) <jesse.zh...@amd.com> wrote:
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> Hi Alex,
>
> -----Original Message-----
> From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> On Behalf Of Alex
> Deucher
> Sent: Saturday, April 26, 2025 2:39 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander <alexander.deuc...@amd.com>
> Subject: [PATCH 1/9] drm/amdgpu/mes: remove more unused functions
>
> These were leftover from mes bring up and are unused.
>
> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 62 -------------------------
> drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 19 --------
> drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 26 -----------
> drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 27 -----------
> 4 files changed, 134 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> index 38ea64d87a0ac..b5a7e2ae72aff 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> @@ -285,68 +285,6 @@ int amdgpu_mes_resume(struct amdgpu_device *adev)
> return r;
> }
>
> -int amdgpu_mes_reset_hw_queue(struct amdgpu_device *adev, int queue_id) -{
> - unsigned long flags;
> - struct amdgpu_mes_queue *queue;
> - struct amdgpu_mes_gang *gang;
> - struct mes_reset_queue_input queue_input;
> - int r;
> -
> - /*
> - * Avoid taking any other locks under MES lock to avoid circular
> - * lock dependencies.
> - */
> - amdgpu_mes_lock(&adev->mes);
> -
> - /* remove the mes gang from idr list */
> - spin_lock_irqsave(&adev->mes.queue_id_lock, flags);
> -
> - queue = idr_find(&adev->mes.queue_id_idr, queue_id);
> - if (!queue) {
> - spin_unlock_irqrestore(&adev->mes.queue_id_lock, flags);
> - amdgpu_mes_unlock(&adev->mes);
> - DRM_ERROR("queue id %d doesn't exist\n", queue_id);
> - return -EINVAL;
> - }
> - spin_unlock_irqrestore(&adev->mes.queue_id_lock, flags);
> -
> - DRM_DEBUG("try to reset queue, doorbell off = 0x%llx\n",
> - queue->doorbell_off);
> -
> - gang = queue->gang;
> - queue_input.doorbell_offset = queue->doorbell_off;
> - queue_input.gang_context_addr = gang->gang_ctx_gpu_addr;
> -
> - r = adev->mes.funcs->reset_hw_queue(&adev->mes, &queue_input);
> - if (r)
> - DRM_ERROR("failed to reset hardware queue, queue id = %d\n",
> - queue_id);
> -
> - amdgpu_mes_unlock(&adev->mes);
> -
> - return 0;
> -}
> -
> -int amdgpu_mes_reset_hw_queue_mmio(struct amdgpu_device *adev, int
> queue_type,
> - int me_id, int pipe_id, int queue_id, int
> vmid)
> -{
> - struct mes_reset_queue_input queue_input;
> - int r;
> -
> - queue_input.queue_type = queue_type;
> - queue_input.use_mmio = true;
> - queue_input.me_id = me_id;
> - queue_input.pipe_id = pipe_id;
> - queue_input.queue_id = queue_id;
> - queue_input.vmid = vmid;
> - r = adev->mes.funcs->reset_hw_queue(&adev->mes, &queue_input);
> - if (r)
> - DRM_ERROR("failed to reset hardware queue by mmio, queue id =
> %d\n",
> - queue_id);
> - return r;
> -}
> -
> int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,
> struct amdgpu_ring *ring)
> {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> index be3390d263012..af6e341f6411e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> @@ -235,18 +235,6 @@ struct mes_remove_queue_input {
> uint64_t gang_context_addr;
> };
>
> -struct mes_reset_queue_input {
> - uint32_t doorbell_offset;
> - uint64_t gang_context_addr;
> - bool use_mmio;
> - uint32_t queue_type;
> - uint32_t me_id;
> - uint32_t pipe_id;
> - uint32_t queue_id;
> - uint32_t xcc_id;
> - uint32_t vmid;
> -};
> -
> struct mes_map_legacy_queue_input {
> uint32_t queue_type;
> uint32_t doorbell_offset;
> @@ -377,9 +365,6 @@ struct amdgpu_mes_funcs {
>
> int (*reset_legacy_queue)(struct amdgpu_mes *mes,
> struct mes_reset_legacy_queue_input *input);
> -
> - int (*reset_hw_queue)(struct amdgpu_mes *mes,
> - struct mes_reset_queue_input *input);
> };
>
> #define amdgpu_mes_kiq_hw_init(adev) (adev)->mes.kiq_hw_init((adev)) @@
> -394,10 +379,6 @@ void amdgpu_mes_fini(struct amdgpu_device *adev); int
> amdgpu_mes_suspend(struct amdgpu_device *adev); int amdgpu_mes_resume(struct
> amdgpu_device *adev);
>
> -int amdgpu_mes_reset_hw_queue(struct amdgpu_device *adev, int queue_id);
> -int amdgpu_mes_reset_hw_queue_mmio(struct amdgpu_device *adev, int
> queue_type,
> - int me_id, int pipe_id, int queue_id, int
> vmid);
> -
> int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,
> struct amdgpu_ring *ring);
> int amdgpu_mes_unmap_legacy_queue(struct amdgpu_device *adev, diff --git
> a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> index 0a5b7a296f08d..5ce62a3f01e7d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> @@ -475,31 +475,6 @@ static int mes_v11_0_reset_queue_mmio(struct amdgpu_mes
> *mes, uint32_t queue_typ
> return r;
> }
>
>
> mes_v11_0_reset_hw_queue and mes_v12_0_reset_hw_queue are used for user queue
> reset on your topic branch.
> Do we really want to remove these two functions?
They are no longer used. See this patch series.
Alex
>
>
> Thanks
> Jesse
> -static int mes_v11_0_reset_hw_queue(struct amdgpu_mes *mes,
> - struct mes_reset_queue_input *input)
> -{
> - if (input->use_mmio)
> - return mes_v11_0_reset_queue_mmio(mes, input->queue_type,
> - input->me_id,
> input->pipe_id,
> - input->queue_id,
> input->vmid);
> -
> - union MESAPI__RESET mes_reset_queue_pkt;
> -
> - memset(&mes_reset_queue_pkt, 0, sizeof(mes_reset_queue_pkt));
> -
> - mes_reset_queue_pkt.header.type = MES_API_TYPE_SCHEDULER;
> - mes_reset_queue_pkt.header.opcode = MES_SCH_API_RESET;
> - mes_reset_queue_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;
> -
> - mes_reset_queue_pkt.doorbell_offset = input->doorbell_offset;
> - mes_reset_queue_pkt.gang_context_addr = input->gang_context_addr;
> - /*mes_reset_queue_pkt.reset_queue_only = 1;*/
> -
> - return mes_v11_0_submit_pkt_and_poll_completion(mes,
> - &mes_reset_queue_pkt, sizeof(mes_reset_queue_pkt),
> - offsetof(union MESAPI__REMOVE_QUEUE, api_status));
> -}
> -
> static int mes_v11_0_map_legacy_queue(struct amdgpu_mes *mes,
> struct mes_map_legacy_queue_input
> *input) { @@ -817,7 +792,6 @@ static const struct amdgpu_mes_funcs
> mes_v11_0_funcs = {
> .resume_gang = mes_v11_0_resume_gang,
> .misc_op = mes_v11_0_misc_op,
> .reset_legacy_queue = mes_v11_0_reset_legacy_queue,
> - .reset_hw_queue = mes_v11_0_reset_hw_queue,
> };
>
> static int mes_v11_0_allocate_ucode_buffer(struct amdgpu_device *adev, diff
> --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
> b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
> index 1f7614dccb005..a3391810c897c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
> @@ -494,32 +494,6 @@ static int mes_v12_0_reset_queue_mmio(struct amdgpu_mes
> *mes, uint32_t queue_typ
> return r;
> }
>
> -static int mes_v12_0_reset_hw_queue(struct amdgpu_mes *mes,
> - struct mes_reset_queue_input *input)
> -{
> - union MESAPI__RESET mes_reset_queue_pkt;
> - int pipe;
> -
> - memset(&mes_reset_queue_pkt, 0, sizeof(mes_reset_queue_pkt));
> -
> - mes_reset_queue_pkt.header.type = MES_API_TYPE_SCHEDULER;
> - mes_reset_queue_pkt.header.opcode = MES_SCH_API_RESET;
> - mes_reset_queue_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;
> -
> - mes_reset_queue_pkt.doorbell_offset = input->doorbell_offset;
> - mes_reset_queue_pkt.gang_context_addr = input->gang_context_addr;
> - /*mes_reset_queue_pkt.reset_queue_only = 1;*/
> -
> - if (mes->adev->enable_uni_mes)
> - pipe = AMDGPU_MES_KIQ_PIPE;
> - else
> - pipe = AMDGPU_MES_SCHED_PIPE;
> -
> - return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,
> - &mes_reset_queue_pkt, sizeof(mes_reset_queue_pkt),
> - offsetof(union MESAPI__REMOVE_QUEUE, api_status));
> -}
> -
> static int mes_v12_0_map_legacy_queue(struct amdgpu_mes *mes,
> struct mes_map_legacy_queue_input
> *input) { @@ -914,7 +888,6 @@ static const struct amdgpu_mes_funcs
> mes_v12_0_funcs = {
> .resume_gang = mes_v12_0_resume_gang,
> .misc_op = mes_v12_0_misc_op,
> .reset_legacy_queue = mes_v12_0_reset_legacy_queue,
> - .reset_hw_queue = mes_v12_0_reset_hw_queue,
> };
>
> static int mes_v12_0_allocate_ucode_buffer(struct amdgpu_device *adev,
> --
> 2.49.0
>
