Re: [PATCH 1/2] drm/amdgpu: Add fw minimum version check for usermode queue

[Khatri, Sunil]

Apart from a minor alignment issue LGTM.
Reviewed-by: Sunil Khatri <sunil.kha...@amd.com>

On 4/10/2025 4:59 PM, Arvind Yadav wrote:

This patch is load usermode queue based on FW support for gfx11.
CP Ucode FW version: [PFP = 2530, ME = 2390, MEC = 2600, MES = 120]

Cc: Alex Deucher <alexander.deuc...@amd.com>
Cc: Christian Koenig <christian.koe...@amd.com>
Cc: Shashank Sharma <shashank.sha...@amd.com>
Cc: Sunil Khatri <sunil.kha...@amd.com>
Signed-off-by: Arvind Yadav <arvind.ya...@amd.com>
---
  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 17 +++++++++++++++--
  1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 91d29f482c3c..d7a401ff79db 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -81,6 +81,11 @@
  #define regCP_HQD_PERSISTENT_STATE_DEFAULT                                    
    0x0be05501
  #define regCP_HQD_IB_CONTROL_DEFAULT                                          
    0x00300000

+#define GFX11_ME_FW_MIN_VERSION 0x00000956

Looks like some alignment issues here  ?

+#define GFX11_PFP_FW_MIN_VERSION                                               
0x000009e2
+#define GFX11_MEC_FW_MIN_VERSION                                               
0x00000a28
+#define GFX11_MES_FW_MIN_VERSION                                               
0x00000078
+
  MODULE_FIRMWARE("amdgpu/gc_11_0_0_pfp.bin");
  MODULE_FIRMWARE("amdgpu/gc_11_0_0_me.bin");
  MODULE_FIRMWARE("amdgpu/gc_11_0_0_mec.bin");
@@ -1590,6 +1595,14 @@ static void gfx_v11_0_alloc_ip_dump(struct amdgpu_device 
*adev)
        }
  }

+static bool gfx_v11_0_is_userq_supported(struct amdgpu_device *adev)

+{
+       return (adev->gfx.me_fw_version >= GFX11_ME_FW_MIN_VERSION &&
+               adev->gfx.pfp_fw_version >= GFX11_PFP_FW_MIN_VERSION &&
+               adev->gfx.mec_fw_version >= GFX11_MEC_FW_MIN_VERSION &&
+               adev->mes.fw_version[0] >= GFX11_MES_FW_MIN_VERSION);
+}
+
  static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
  {
        int i, j, k, r, ring_id;
@@ -1632,7 +1645,7 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block 
*ip_block)
        case IP_VERSION(11, 0, 3):
  #ifdef CONFIG_DRM_AMDGPU_NAVI3X_USERQ
                /* add firmware version checks here */
-               if (0) {
+               if (gfx_v11_0_is_userq_supported(adev)) {
                        adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs;
                        adev->userq_funcs[AMDGPU_HW_IP_COMPUTE] = 
&userq_mes_funcs;
                }
@@ -1646,7 +1659,7 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block 
*ip_block)
        case IP_VERSION(11, 5, 3):
  #ifdef CONFIG_DRM_AMDGPU_NAVI3X_USERQ
                /* add firmware version checks here */
-               if (0) {
+               if (gfx_v11_0_is_userq_supported(adev)) {
                        adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs;
                        adev->userq_funcs[AMDGPU_HW_IP_COMPUTE] = 
&userq_mes_funcs;
                }