Ping?
Alex
On Fri, Mar 28, 2025 at 9:09 AM Alex Deucher <alexander.deuc...@amd.com> wrote:
>
> Don't fetch it again if we already have it. It seems the
> registers don't reliably have the value at resume in some
> cases.
>
> Fixes: 785f0f9fe742 ("drm/amdgpu: Add mes v12_0 ip block support (v4)")
> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 21 ++++++++++++---------
> 1 file changed, 12 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
> b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
> index bcabebd18fe84..8892858cfd9ae 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
> @@ -1392,17 +1392,20 @@ static int mes_v12_0_queue_init(struct amdgpu_device
> *adev,
> mes_v12_0_queue_init_register(ring);
> }
>
> - /* get MES scheduler/KIQ versions */
> - mutex_lock(&adev->srbm_mutex);
> - soc21_grbm_select(adev, 3, pipe, 0, 0);
> + if (((pipe == AMDGPU_MES_SCHED_PIPE) && !adev->mes.sched_version) ||
> + ((pipe == AMDGPU_MES_KIQ_PIPE) && !adev->mes.kiq_version)) {
> + /* get MES scheduler/KIQ versions */
> + mutex_lock(&adev->srbm_mutex);
> + soc21_grbm_select(adev, 3, pipe, 0, 0);
>
> - if (pipe == AMDGPU_MES_SCHED_PIPE)
> - adev->mes.sched_version = RREG32_SOC15(GC, 0,
> regCP_MES_GP3_LO);
> - else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
> - adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
> + if (pipe == AMDGPU_MES_SCHED_PIPE)
> + adev->mes.sched_version = RREG32_SOC15(GC, 0,
> regCP_MES_GP3_LO);
> + else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
> + adev->mes.kiq_version = RREG32_SOC15(GC, 0,
> regCP_MES_GP3_LO);
>
> - soc21_grbm_select(adev, 0, 0, 0, 0);
> - mutex_unlock(&adev->srbm_mutex);
> + soc21_grbm_select(adev, 0, 0, 0, 0);
> + mutex_unlock(&adev->srbm_mutex);
> + }
>
> return 0;
> }
> --
> 2.49.0
>
